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acknowledge requests after handling them
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commit
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@ -4,16 +4,36 @@
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.section .iwram, "ax"
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.align
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InterruptHandler:
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ldr r2, =0x04000200 @ interrupt enable register location
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mov r2, #0x04000000 @ interrupt enable register location
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add r2, #0x200
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mov r1, #0
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strh r1, [r2, #8]
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push {r2}
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ldrh r1, [r2] @ load 16 bit interrupt enable to r1
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ldrh r3, [r2, #2] @ load 16 bit interrupt request to r3
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and r0, r1, r3 @ interrupts both enabled and requested
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@ change to system mode
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mrs r1, cpsr
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orr r1, r1, #0xD
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msr cpsr_c, r1
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@ call the rust interrupt handler with r0 set to the triggered interrupts
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ldr r1, =__RUST_INTERRUPT_HANDLER
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push {lr, r2}
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mov lr, pc
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bx r1
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pop {lr, r2}
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@ change back to interrupt mode
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mrs r1, cpsr
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bic r1, r1, #0xD
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msr cpsr_c, r1
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mov r1, #1
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strh r1, [r2, #8]
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strh r0, [r2, #2] @ store to interrupt request
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ldr r2, =0x03007FF8 @ load bios interrupt request location
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@ -21,27 +41,5 @@ InterruptHandler:
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orr r1, r1, r0 @ or with enabled and requested interrupts
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strh r1, [r2] @ acknowlege bios requests
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@ change to system mode
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mrs r2, cpsr
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orr r2, r2, #0xD
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msr cpsr_c, r2
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@ call the rust interrupt handler with r0 set to the triggered interrupts
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ldr r1, =__RUST_INTERRUPT_HANDLER
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push {lr}
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mov lr, pc
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bx r1
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pop {lr}
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@ change back to interrupt mode
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mrs r2, cpsr
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bic r2, r2, #0xD
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msr cpsr_c, r2
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pop {r2}
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mov r1, #1
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strh r1, [r2, #8]
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bx lr @ return to bios
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.pool
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@ -139,12 +139,14 @@ static mut INTERRUPT_TABLE: [InterruptRoot; 14] = [
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];
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#[no_mangle]
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extern "C" fn __RUST_INTERRUPT_HANDLER(interrupt: u16) {
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extern "C" fn __RUST_INTERRUPT_HANDLER(interrupt: u16) -> u16 {
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for (i, root) in unsafe { INTERRUPT_TABLE.iter().enumerate() } {
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if (1 << i) & interrupt != 0 {
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root.trigger_interrupts();
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}
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}
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interrupt
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}
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pub struct InterruptClosureBounded<'a> {
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