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don't disable and reenable interrupts
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parent
b98e6cbb02
commit
597b9370fc
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@ -5,9 +5,6 @@
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InterruptHandlerSimple:
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InterruptHandlerSimple:
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ldr r4, =0x04000200 @ interrupt enable register location
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ldr r4, =0x04000200 @ interrupt enable register location
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@ disable interrupts by setting bit 0 to 0
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strh r2, [r4, #8]
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ldrh r1, [r4] @ load 16 bit interrupt enable to r1
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ldrh r1, [r4] @ load 16 bit interrupt enable to r1
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ldrh r3, [r4, #2] @ load 16 bit interrupt request to r3
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ldrh r3, [r4, #2] @ load 16 bit interrupt request to r3
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and r0, r1, r3 @ interrupts both enabled and requested
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and r0, r1, r3 @ interrupts both enabled and requested
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@ -37,9 +34,5 @@ InterruptHandlerSimple:
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orr r2, r2, #0x92
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orr r2, r2, #0x92
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msr cpsr_c, r2
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msr cpsr_c, r2
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@ reenable interrupts by setting bit 0 to 1
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mov r0, #1
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strh r0, [r4, #8]
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bx lr @ return to bios
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bx lr @ return to bios
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.pool
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.pool
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