From bb57298c54e8aa2aac90abcea64557074e8d0462 Mon Sep 17 00:00:00 2001
From: Gwilym Inzani <email@gwilym.dev>
Date: Wed, 6 Sep 2023 00:37:23 +0100
Subject: [PATCH] This has better code generation

---
 agb/src/display/tiled/vram_manager.rs | 45 ++++++++++++++++-----------
 1 file changed, 26 insertions(+), 19 deletions(-)

diff --git a/agb/src/display/tiled/vram_manager.rs b/agb/src/display/tiled/vram_manager.rs
index b92e00de..e133f4e2 100644
--- a/agb/src/display/tiled/vram_manager.rs
+++ b/agb/src/display/tiled/vram_manager.rs
@@ -385,25 +385,32 @@ impl VRamManager {
         let target_location = tile_reference.0.as_ptr() as *mut _;
 
         unsafe {
-            core::arch::asm!(
-                "cmp r2, #0",
-                "beq 1f",
-                "ldmia r0!, {{r2-r5}}",
-                "stmia r1!, {{r2-r5}}",
-                "ldmia r0!, {{r2-r5}}",
-                "stmia r1!, {{r2-r5}}",
-                "1:",
-                "ldmia r0!, {{r2-r5}}",
-                "stmia r1!, {{r2-r5}}",
-                "ldmia r0!, {{r2-r5}}",
-                "stmia r1!, {{r2-r5}}",
-                inout("r0") tile_data_start => _,
-                inout("r1") target_location => _,
-                inout("r2") tile_format as u32 => _,
-                out("r3") _,
-                out("r4") _,
-                out("r5") _,
-            );
+            match tile_format {
+                TileFormat::FourBpp => core::arch::asm!(
+                    ".rept 2",
+                    "ldmia r0!, {{r2-r5}}",
+                    "stmia r1!, {{r2-r5}}",
+                    ".endr",
+                    inout("r0") tile_data_start => _,
+                    inout("r1") target_location => _,
+                    out("r2") _,
+                    out("r3") _,
+                    out("r4") _,
+                    out("r5") _,
+                ),
+                TileFormat::EightBpp => core::arch::asm!(
+                    ".rept 4",
+                    "ldmia r0!, {{r2-r5}}",
+                    "stmia r1!, {{r2-r5}}",
+                    ".endr",
+                    inout("r0") tile_data_start => _,
+                    inout("r1") target_location => _,
+                    out("r2") _,
+                    out("r3") _,
+                    out("r4") _,
+                    out("r5") _,
+                ),
+            }
         }
     }