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Add ability for DMA2 to do something

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This commit is contained in:
Gwilym Kuiper 2021-06-10 22:32:02 +01:00
parent ffd4f8e773
commit c5d58e83a7
1 changed files with 19 additions and 2 deletions
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21
agb/src/sound/mixer/hw.rs
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@ -6,7 +6,13 @@ const DMA1_DEST_ADDR: MemoryMapped<u32> = unsafe { MemoryMapped::new(0x0400_00c0
const _DMA1_WORD_COUNT: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_00c4) }; // sound ignores this for some reason const _DMA1_WORD_COUNT: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_00c4) }; // sound ignores this for some reason
const DMA1_CONTROL: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_00c6) }; const DMA1_CONTROL: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_00c6) };
const DMA2_SOURCE_ADDR: MemoryMapped<u32> = unsafe { MemoryMapped::new(0x0400_00ca) };
const DMA2_DEST_ADDR: MemoryMapped<u32> = unsafe { MemoryMapped::new(0x0400_00cc) };
const _DMA2_WORD_COUNT: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_00d0) };
const DMA2_CONTROL: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_00d2) };
const FIFOA_DEST_ADDR: u32 = 0x0400_00a0; const FIFOA_DEST_ADDR: u32 = 0x0400_00a0;
const FIFOB_DEST_ADDR: u32 = 0x0400_00a4;
// Similarly for proper timer support // Similarly for proper timer support
const TIMER0_COUNTER: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_0100) }; const TIMER0_COUNTER: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_0100) };
@ -15,17 +21,28 @@ const TIMER0_CONTROL: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_0102
const SOUND_CONTROL: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_0082) }; const SOUND_CONTROL: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_0082) };
const SOUND_CONTROL_X: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_0084) }; const SOUND_CONTROL_X: MemoryMapped<u16> = unsafe { MemoryMapped::new(0x0400_0084) };
pub(super) fn enable_dma1_for_sound(sound_memory: &[i8]) { const DMA_CONTROL_SETTING_FOR_SOUND: u16 = {
let dest_fixed: u16 = 2 << 5; // dest addr control = fixed let dest_fixed: u16 = 2 << 5; // dest addr control = fixed
let repeat: u16 = 1 << 9; let repeat: u16 = 1 << 9;
let transfer_type: u16 = 1 << 10; // transfer in words let transfer_type: u16 = 1 << 10; // transfer in words
let dma_start_timing: u16 = 3 << 12; // sound fifo timing let dma_start_timing: u16 = 3 << 12; // sound fifo timing
let enable: u16 = 1 << 15; // enable let enable: u16 = 1 << 15; // enable
dest_fixed | repeat | transfer_type | dma_start_timing | enable
};
pub(super) fn enable_dma1_for_sound(sound_memory: &[i8]) {
DMA1_CONTROL.set(0); DMA1_CONTROL.set(0);
DMA1_SOURCE_ADDR.set(sound_memory.as_ptr() as u32); DMA1_SOURCE_ADDR.set(sound_memory.as_ptr() as u32);
DMA1_DEST_ADDR.set(FIFOA_DEST_ADDR); DMA1_DEST_ADDR.set(FIFOA_DEST_ADDR);
DMA1_CONTROL.set(dest_fixed | repeat | transfer_type | dma_start_timing | enable); DMA1_CONTROL.set(DMA_CONTROL_SETTING_FOR_SOUND);
}
pub(super) fn enable_dma2_for_sound(sound_memory: &[i8]) {
DMA2_CONTROL.set(0);
DMA2_SOURCE_ADDR.set(sound_memory.as_ptr() as u32);
DMA2_DEST_ADDR.set(FIFOB_DEST_ADDR);
DMA2_CONTROL.set(DMA_CONTROL_SETTING_FOR_SOUND);
} }
pub(super) fn set_sound_control_register_for_mixer() { pub(super) fn set_sound_control_register_for_mixer() {