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disable interrupts during handler
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commit
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@ -6,6 +6,11 @@
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InterruptHandlerSimple:
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InterruptHandlerSimple:
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ldr r2, =0x04000200 @ interrupt enable register location
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ldr r2, =0x04000200 @ interrupt enable register location
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mov r1, #0
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strh r1, [r2, #8]
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push {r2}
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ldrh r1, [r2] @ load 16 bit interrupt enable to r1
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ldrh r1, [r2] @ load 16 bit interrupt enable to r1
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ldrh r3, [r2, #2] @ load 16 bit interrupt request to r3
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ldrh r3, [r2, #2] @ load 16 bit interrupt request to r3
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and r0, r1, r3 @ interrupts both enabled and requested
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and r0, r1, r3 @ interrupts both enabled and requested
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@ -33,5 +38,10 @@ InterruptHandlerSimple:
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bic r2, r2, #0xD
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bic r2, r2, #0xD
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msr cpsr_c, r2
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msr cpsr_c, r2
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pop {r2}
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mov r1, #0
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strh r1, [r2, #8]
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bx lr @ return to bios
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bx lr @ return to bios
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.pool
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.pool
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