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Split into regular, multiboot and common
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parent
243e810150
commit
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@ -21,7 +21,7 @@ SECTIONS {
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. = ORIGIN(rom);
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.text : {
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KEEP(*(.entrypoint));
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*(.entrypoint.regular .entrypoint.common);
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*(.text .text*);
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. = ALIGN(4);
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@ -1,32 +1,13 @@
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.arm
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.global __start
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.section .entrypoint
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.section .entrypoint.regular, "ax", %progbits
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.align
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.global __start
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__start:
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b .Initialise
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@ Filled in by gbafix
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.fill 188, 1, 0
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@ multiboot launch point
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__mb_entry:
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b .Initialise_mb
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.byte 0 @ boot mode, BIOS overwrites this value
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.byte 0 @ slave ID number
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.fill 26, 1, 0 @ unused?
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.word 0 @ joybus entrypoint
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.Initialise_mb:
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swi 0x00250000
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@ Set interrupt handler
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ldr r0, =InterruptHandler
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ldr r1, =0x03007FFC
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str r0, [r1]
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b .CommonInit
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.space 188
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.Initialise:
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@ Set interrupt handler
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@ -44,8 +25,38 @@ __mb_entry:
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@ r2: length + size information
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@
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@ see: https://mgba-emu.github.io/gbatek/#swi-0bh-gbands7nds9dsi7dsi9---cpuset
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ldr r0, =CommonInit
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bx r0
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.CommonInit:
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.arm
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.section .entrypoint.multiboot, "ax", %progbits
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.align
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@ Filled in by gbafix
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.space 192
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@ multiboot launch point
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__mb_entry:
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b .Initialise_mb
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.byte 0 @ boot mode, BIOS overwrites this value
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.byte 0 @ slave ID number
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.space 26 @ unused?
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.Initialise_mb:
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swi 0x00250000
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@ Set interrupt handler
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ldr r0, =InterruptHandler
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ldr r1, =0x03007FFC
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str r0, [r1]
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ldr r0, =CommonInit
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bx r0
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.arm
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.section .entrypoint.common, "ax", %progbits
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.align
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.global CommonInit
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CommonInit:
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@ set the waitstate control register to the normal value used in manufactured cartridges
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ldr r0, =0x04000204 @ address for waitstate control register
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ldr r1, =0x4317 @ WS0/ROM=3,1 clks; SRAM=8 clks; WS2/EEPROM: 8,8 clks; prefetch enabled
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