diff --git a/src/processor/memory/rom/mbcs/mbc5.rs b/src/processor/memory/rom/mbcs/mbc5.rs
index e299b0a..c18f28d 100644
--- a/src/processor/memory/rom/mbcs/mbc5.rs
+++ b/src/processor/memory/rom/mbcs/mbc5.rs
@@ -73,7 +73,7 @@ impl Mbc for Mbc5 {
     fn set(&mut self, address: Address, data: u8) {
         match address {
             0x0..0x2000 => {
-                if data == 0xA {
+                if (data & 0xF) == 0xA {
                     self.ram_enabled = true
                 } else {
                     self.ram_enabled = false