pulse channel control register empty bits are high rather than low

2023-02-20 10:01:32 +11:00 · 2023-02-20 10:01:32 +11:00 · 0f38e89312
parent 20f324caa8
commit 0f38e89312
1 changed files with 1 additions and 1 deletions
--- a/src/processor/memory/mmio/apu/channels.rs
+++ b/src/processor/memory/mmio/apu/channels.rs
@ -268,7 +268,7 @@ impl PwmChannel {
    }

    pub(super) fn get_control(&self) -> u8 {
-        set_or_clear_bit(0, 6, self.length_enable)
+        set_or_clear_bit(0xFF, 6, self.length_enable)
    }

    fn set_wave_timer(&mut self) {