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serial waits for ime

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This commit is contained in:
Alex Janka 2023-03-16 11:04:44 +11:00
parent 5f2a6ed14d
commit 198ced9cb6
3 changed files with 8 additions and 7 deletions
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2
gb-vst/src/lib.rs
View file

@ -124,7 +124,6 @@ impl Plugin for GameboyEmu {
velocity: _, velocity: _,
} => { } => {
if channel < 5 { if channel < 5 {
println!("noteon: {as_bytes:#?}");
vars.serial_tx.send(0x90 + channel).unwrap(); vars.serial_tx.send(0x90 + channel).unwrap();
vars.serial_tx.send(as_bytes[1]).unwrap(); vars.serial_tx.send(as_bytes[1]).unwrap();
vars.serial_tx.send(as_bytes[2]).unwrap(); vars.serial_tx.send(as_bytes[2]).unwrap();
@ -138,7 +137,6 @@ impl Plugin for GameboyEmu {
velocity: _, velocity: _,
} => { } => {
if channel < 5 { if channel < 5 {
println!("noteoff: {as_bytes:#?}");
vars.serial_tx.send(0x80 + channel).unwrap(); vars.serial_tx.send(0x80 + channel).unwrap();
vars.serial_tx.send(as_bytes[1]).unwrap(); vars.serial_tx.send(as_bytes[1]).unwrap();
vars.serial_tx.send(as_bytes[2]).unwrap(); vars.serial_tx.send(as_bytes[2]).unwrap();

2
lib/src/processor/memory.rs
View file

@ -314,7 +314,7 @@ impl<ColourFormat: From<Colour> + Clone> Cpu<ColourFormat> {
self.memory.apu.tick(steps); self.memory.apu.tick(steps);
let serial_interrupt = self.memory.serial.tick(steps); let serial_interrupt = self.memory.serial.tick(steps, self.memory.ime);
self.memory self.memory
.interrupts .interrupts
.set_interrupt(Interrupt::Serial, serial_interrupt); .set_interrupt(Interrupt::Serial, serial_interrupt);

9
lib/src/processor/memory/mmio/serial.rs
View file

@ -57,7 +57,7 @@ struct InputByte {
input_delay: usize, input_delay: usize,
} }
const BYTE_DELAY: usize = 20000; const BYTE_DELAY: usize = 2000;
impl InputByte { impl InputByte {
fn advance(&mut self, rx: &Option<Receiver<u8>>) -> u8 { fn advance(&mut self, rx: &Option<Receiver<u8>>) -> u8 {
@ -154,7 +154,7 @@ impl Serial {
!matches!(&self.target, SerialTarget::None) !matches!(&self.target, SerialTarget::None)
} }
pub fn tick(&mut self, steps: usize) -> bool { pub fn tick(&mut self, steps: usize, ime: bool) -> bool {
let mut will_interrupt = false; let mut will_interrupt = false;
if !self.is_connected() { if !self.is_connected() {
return false; return false;
@ -165,11 +165,14 @@ impl Serial {
&None &None
}; };
for _ in 0..steps { for _ in 0..steps {
if ime {
self.input_byte.input_delay = self.input_byte.input_delay.saturating_sub(1); self.input_byte.input_delay = self.input_byte.input_delay.saturating_sub(1);
}
if (self.control.transfer_in_progress if (self.control.transfer_in_progress
&& self.control.clock_source == ClockSource::Internal) && self.control.clock_source == ClockSource::Internal)
|| (self.control.clock_source == ClockSource::External || (self.control.clock_source == ClockSource::External
&& self.input_byte.is_ready(rx)) && self.input_byte.is_ready(rx)
&& ime)
{ {
self.output_byte = self.output_byte << 1 | self.byte >> 7; self.output_byte = self.output_byte << 1 | self.byte >> 7;
self.byte = (self.byte << 1) | self.input_byte.advance(rx); self.byte = (self.byte << 1) | self.input_byte.advance(rx);