From 5c61c642bf03b4efc246c3d857b4ab6137c5acb9 Mon Sep 17 00:00:00 2001
From: Alex Janka <alex@alexjanka.com>
Date: Sun, 23 Apr 2023 19:32:21 +1000
Subject: [PATCH] ...why did i only give the cgb 7 wram banks?

---
 lib/src/processor/memory.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/src/processor/memory.rs b/lib/src/processor/memory.rs
index 336d60f..de7e5c6 100644
--- a/lib/src/processor/memory.rs
+++ b/lib/src/processor/memory.rs
@@ -40,8 +40,8 @@ enum WramBanks {
         bank: Box<[u8; 4096]>,
     },
     Cgb {
-        #[serde_as(as = "Box<[[_; 4096]; 7]>")]
-        banks: Box<[[u8; 4096]; 7]>,
+        #[serde_as(as = "Box<[[_; 4096]; 8]>")]
+        banks: Box<[[u8; 4096]; 8]>,
         selected: usize,
     },
 }
@@ -52,7 +52,7 @@ impl Wram {
             bank_0: [0; 4096],
             banks: if cgb {
                 WramBanks::Cgb {
-                    banks: Box::new([[0; 4096]; 7]),
+                    banks: Box::new([[0; 4096]; 8]),
                     selected: 0,
                 }
             } else {