From 5e944d0f459f9c1830a135f533de2f138496ac3d Mon Sep 17 00:00:00 2001
From: Alex Janka <alex@alexjanka.com>
Date: Thu, 25 May 2023 16:30:03 +1000
Subject: [PATCH] fix mirrored ram

---
 lib/src/processor/memory.rs           | 17 +++++++++++++----
 lib/src/processor/memory/addresses.rs | 12 ++++++++----
 2 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/lib/src/processor/memory.rs b/lib/src/processor/memory.rs
index d8e6e29..65d94e9 100644
--- a/lib/src/processor/memory.rs
+++ b/lib/src/processor/memory.rs
@@ -222,7 +222,10 @@ where
             Address::CartRam(address) => self.rom.get_ram(address),
             Address::WorkRam(address) => self.ram.bank_0[address.get_local() as usize],
             Address::BankedWorkRam(address) => self.ram.get_banked((address.get_local()) as usize),
-            Address::MirroredRam(address) => self.ram.bank_0[address.get_local() as usize],
+            Address::MirroredWorkRam(address) => self.ram.bank_0[address.get_local() as usize],
+            Address::MirroredBankedWorkRam(address) => {
+                self.ram.get_banked((address.get_local()) as usize)
+            }
             Address::Oam(address) => self.gpu.get_oam(address),
             Address::Prohibited(_) => 0xFF,
             Address::Io(address) => self.get_io(address),
@@ -258,7 +261,12 @@ where
             Address::BankedWorkRam(address) => {
                 self.ram.set_banked(address.get_local() as usize, data)
             }
-            Address::MirroredRam(address) => self.ram.bank_0[address.get_local() as usize] = data,
+            Address::MirroredWorkRam(address) => {
+                self.ram.bank_0[address.get_local() as usize] = data
+            }
+            Address::MirroredBankedWorkRam(address) => {
+                self.ram.set_banked(address.get_local() as usize, data)
+            }
             Address::Oam(address) => self.gpu.set_oam(address, data),
             Address::Prohibited(_) => {}
             Address::Io(address) => {
@@ -320,7 +328,8 @@ where
                         CgbIoAddress::Pcm12 => self.apu.get_pcm_1_2(),
                         CgbIoAddress::Pcm34 => self.apu.get_pcm_3_4(),
                         CgbIoAddress::Unused(v) => {
-                            todo!("attempt to get 0x{v:0>4X}")                            
+                            eprintln!("attempt to get 0x{v:0>4X}");
+                            0xFF
                         }
                     }
                 } else {
@@ -378,7 +387,7 @@ where
                         CgbIoAddress::Pcm12 => {},
                         CgbIoAddress::Pcm34 => {},
                         CgbIoAddress::Unused(v) => {
-                            todo!("attempt to set 0x{v:0>4X} to 0x{data:0>2X}")
+                            eprintln!("attempt to set 0x{v:0>4X} to 0x{data:0>2X}")
                         }
                     }
                 }
diff --git a/lib/src/processor/memory/addresses.rs b/lib/src/processor/memory/addresses.rs
index ad9ad5e..a93f1f7 100644
--- a/lib/src/processor/memory/addresses.rs
+++ b/lib/src/processor/memory/addresses.rs
@@ -8,7 +8,8 @@ pub(crate) type VramAddress = BoundedAddress<0x8000, 0xA000>;
 pub(crate) type CartRamAddress = BoundedAddress<0xA000, 0xC000>;
 pub(crate) type WorkRamAddress = BoundedAddress<0xC000, 0xD000>;
 pub(crate) type BankedWorkRamAddress = BoundedAddress<0xD000, 0xE000>;
-pub(crate) type MirroredRamAddress = BoundedAddress<0xE000, 0xFE00>;
+pub(crate) type MirroredWorkRamAddress = BoundedAddress<0xE000, 0xF000>;
+pub(crate) type MirroredBankedWorkRamAddress = BoundedAddress<0xF000, 0xFE00>;
 pub(crate) type OamAddress = BoundedAddress<0xFE00, 0xFEA0>;
 pub(crate) type ProhibitedAddress = BoundedAddress<0xFEA0, 0xFF00>;
 pub(crate) type HramAddress = BoundedAddress<0xFF80, 0xFFFF>;
@@ -67,7 +68,8 @@ pub(crate) enum Address {
     CartRam(CartRamAddress),
     WorkRam(WorkRamAddress),
     BankedWorkRam(BankedWorkRamAddress),
-    MirroredRam(MirroredRamAddress),
+    MirroredWorkRam(MirroredWorkRamAddress),
+    MirroredBankedWorkRam(MirroredBankedWorkRamAddress),
     Oam(OamAddress),
     Prohibited(ProhibitedAddress),
     Io(IoAddress),
@@ -83,7 +85,8 @@ impl From<u16> for Address {
             0xA000..0xC000 => Address::CartRam(value.try_into().unwrap()),
             0xC000..0xD000 => Address::WorkRam(value.try_into().unwrap()),
             0xD000..0xE000 => Address::BankedWorkRam(value.try_into().unwrap()),
-            0xE000..0xFE00 => Address::MirroredRam(value.try_into().unwrap()),
+            0xE000..0xF000 => Address::MirroredWorkRam(value.try_into().unwrap()),
+            0xF000..0xFE00 => Address::MirroredBankedWorkRam(value.try_into().unwrap()),
             0xFE00..0xFEA0 => Address::Oam(value.try_into().unwrap()),
             0xFEA0..0xFF00 => Address::Prohibited(value.try_into().unwrap()),
             0xFF00..0xFF80 => Address::Io(value.try_into().unwrap()),
@@ -202,7 +205,8 @@ impl AddressMarker for Address {
             Address::CartRam(v) => v.inner(),
             Address::WorkRam(v) => v.inner(),
             Address::BankedWorkRam(v) => v.inner(),
-            Address::MirroredRam(v) => v.inner(),
+            Address::MirroredWorkRam(v) => v.inner(),
+            Address::MirroredBankedWorkRam(v) => v.inner(),
             Address::Oam(v) => v.inner(),
             Address::Prohibited(v) => v.inner(),
             Address::Io(v) => v.inner(),