diff --git a/src/processor/mod.rs b/src/processor/mod.rs
index dba43b0..c0e04ac 100644
--- a/src/processor/mod.rs
+++ b/src/processor/mod.rs
@@ -53,11 +53,9 @@ impl CPU {
     }
 }
 
-#[allow(dead_code)]
 #[derive(Clone, Copy)]
 pub enum Reg8 {
     A,
-    F,
     B,
     C,
     D,
@@ -95,7 +93,6 @@ impl Registers {
     fn get_8(&self, register: Reg8) -> u8 {
         match register {
             Reg8::A => self.af.get_high(),
-            Reg8::F => self.af.get_low(),
             Reg8::B => self.bc.get_high(),
             Reg8::C => self.bc.get_low(),
             Reg8::D => self.de.get_high(),
@@ -107,7 +104,6 @@ impl Registers {
     fn set_8(&mut self, register: Reg8, val: u8) {
         match register {
             Reg8::A => self.af.set_high(val),
-            Reg8::F => self.af.set_low(val),
             Reg8::B => self.bc.set_high(val),
             Reg8::C => self.bc.set_low(val),
             Reg8::D => self.de.set_high(val),
diff --git a/src/processor/opcodes.rs b/src/processor/opcodes.rs
index ee66712..8aa08f4 100644
--- a/src/processor/opcodes.rs
+++ b/src/processor/opcodes.rs
@@ -5,7 +5,6 @@ use super::{
 };
 
 impl CPU {
-    #[allow(dead_code)]
     pub fn run_opcode(&mut self, opcode: u8) {
         match opcode {
             0x00 => {