diff --git a/src/main.rs b/src/main.rs
index 01f973a..70b0ee4 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -5,7 +5,7 @@ mod processor;
 use clap::{ArgGroup, Parser};
 use minifb::{Window, WindowOptions};
 use processor::{
-    memory::{Memory, ROM},
+    memory::{rom::ROM, Memory},
     Registers, CPU,
 };
 use std::{
@@ -84,18 +84,6 @@ fn cpu_ram_init(cpu: &mut CPU) {
     cpu.memory.set(0xFF49, 0xFF);
 }
 
-#[allow(dead_code)]
-fn swap_rom_endian(rom: &ROM) -> ROM {
-    rom.chunks(2)
-        .map(|l| {
-            let mut m = l.to_owned();
-            m.reverse();
-            m
-        })
-        .flatten()
-        .collect()
-}
-
 static mut PAUSE_ENABLED: bool = false;
 static mut PAUSE_QUEUED: bool = false;
 // static mut VERBOSE: bool = false;
@@ -126,8 +114,8 @@ fn main() {
 
     window.topmost(true);
 
-    let rom: ROM = fs::read(args.rom).expect("Could not load ROM");
-    let bootrom: ROM = fs::read(args.bootrom).expect("Could not load BootROM");
+    let rom: ROM = ROM::load(fs::read(args.rom).expect("Could not load ROM"));
+    let bootrom: Vec<u8> = fs::read(args.bootrom).expect("Could not load BootROM");
 
     let mut cpu = CPU::new(Memory::init(bootrom, args.run_bootrom, rom), window);
 
diff --git a/src/processor/memory.rs b/src/processor/memory.rs
index 3a36d1e..07de982 100644
--- a/src/processor/memory.rs
+++ b/src/processor/memory.rs
@@ -1,3 +1,4 @@
+use self::rom::ROM;
 use crate::{
     processor::{clear_bit, get_bit},
     verbose_println,
@@ -5,8 +6,9 @@ use crate::{
 use minifb::Key;
 use std::io::{stdout, Write};
 
+pub(crate) mod rom;
+
 pub(crate) type Address = u16;
-pub(crate) type ROM = Vec<u8>;
 
 enum JoypadBank {
     Action,
@@ -80,7 +82,7 @@ impl Default for Joypad {
 
 #[allow(dead_code)]
 pub struct Memory {
-    bootrom: ROM,
+    bootrom: Vec<u8>,
     bootrom_enabled: bool,
     rom: ROM,
     vram: [u8; 8192],
@@ -97,7 +99,7 @@ pub struct Memory {
 }
 
 impl Memory {
-    pub fn init(bootrom: ROM, bootrom_enabled: bool, rom: ROM) -> Self {
+    pub fn init(bootrom: Vec<u8>, bootrom_enabled: bool, rom: ROM) -> Self {
         Self {
             bootrom,
             bootrom_enabled,
@@ -124,7 +126,7 @@ impl Memory {
                 if self.bootrom_enabled && ((address as usize) < self.bootrom.len()) {
                     return self.bootrom[address as usize];
                 } else {
-                    return self.rom[address as usize];
+                    return self.rom.get(address);
                 }
             }
             0x8000..0xA000 => {
diff --git a/src/processor/memory/rom.rs b/src/processor/memory/rom.rs
new file mode 100644
index 0000000..3040ca2
--- /dev/null
+++ b/src/processor/memory/rom.rs
@@ -0,0 +1,15 @@
+use crate::processor::memory::Address;
+
+pub struct ROM {
+    data: Vec<u8>,
+}
+
+impl ROM {
+    pub fn load(data: Vec<u8>) -> Self {
+        Self { data }
+    }
+
+    pub(super) fn get(&self, address: Address) -> u8 {
+        self.data[address as usize]
+    }
+}