From 8f3cf515a9e4cfd2677aa9c424b15550477d922e Mon Sep 17 00:00:00 2001 From: Alex Janka Date: Wed, 18 Jan 2023 13:58:53 +1100 Subject: [PATCH] fix interrupts --- src/main.rs | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/src/main.rs b/src/main.rs index 67447af..cf55c7c 100644 --- a/src/main.rs +++ b/src/main.rs @@ -54,6 +54,7 @@ pub struct Memory { switchable_ram: [u8; 8192], cpu_ram: [u8; 128], oam: [u8; 160], + interrupts: u8, ime: bool, io: [u8; 76], } @@ -69,6 +70,7 @@ impl Memory { switchable_ram: [0x0; 8192], cpu_ram: [0x0; 128], oam: [0x0; 160], + interrupts: 0x0, ime: false, io: [0x0; 76], } @@ -113,7 +115,7 @@ impl Memory { return self.cpu_ram[(address - 0xFF80) as usize]; } 0xFFFF => { - return if self.ime { 1 } else { 0 }; + return self.interrupts; } } } @@ -143,6 +145,9 @@ impl Memory { // println!("empty space write: {:#X} to addr {:#X}", data, address); } 0xFF00..0xFF4C => { + print!("writing to addr {:#X}\r", address); + stdout().flush().unwrap(); + if address == 0xFF02 && data == 0x81 { print!("{}", self.get(0xFF01) as char); stdout().flush().unwrap(); @@ -155,11 +160,11 @@ impl Memory { 0xFF80..0xFFFF => { self.cpu_ram[(address - 0xFF80) as usize] = data; } - 0xFFFF => match data { - 0x0 => self.ime = false, - 0x1 => self.ime = true, - _ => panic!("wrote weird number to ime: {:#X}", data), - }, + 0xFFFF => { + println!("interrupts set to {:#b}", data); + println!(" / {:#X}", data); + self.interrupts = data; + } } } } @@ -224,7 +229,7 @@ fn main() { }, None => loop { cycle_num += 1; - print_cycles(&cycle_num); + // print_cycles(&cycle_num); cpu.exec_next(); }, }