new register impl & stepping execution
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parent
1b1b8bbd9f
commit
9789826cf3
2 changed files with 61 additions and 28 deletions
1
.gitignore
vendored
1
.gitignore
vendored
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@ -1,2 +1,3 @@
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/target
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/test-roms
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/bootrom
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88
src/main.rs
88
src/main.rs
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@ -1,7 +1,10 @@
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#![feature(exclusive_range_pattern)]
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use clap::Parser;
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use std::fs;
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use std::{
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fs,
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io::{self, Read, Write},
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};
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/// Simple program to greet a person
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#[derive(Parser, Debug)]
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@ -10,13 +13,26 @@ struct Args {
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/// ROM path
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#[arg(short, long)]
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rom: String,
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/// BootROM path
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#[arg(short, long)]
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bootrom: String,
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}
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type Register = u16;
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type Instruction = u8;
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type Address = u16;
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type ROM = Vec<u8>;
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#[derive(Clone, Copy)]
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struct Inner {
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left: u8,
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right: u8,
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}
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union Register {
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as_u8s: Inner,
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as_u16: u16,
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}
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struct Memory {
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rom: ROM,
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vram: [u8; 8192],
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@ -48,7 +64,7 @@ impl Memory {
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return self.ram[(address - 0xC000) as usize];
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}
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0xE000..0xFE00 => {
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panic!("ram mirror")
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return self.ram[(address - 0xE000) as usize];
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}
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0xFE00..0xFEA0 => {
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panic!("sprite attrib memory");
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@ -72,7 +88,6 @@ impl Memory {
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}
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}
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#[derive(Debug)]
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struct State {
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af: Register,
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bc: Register,
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@ -86,12 +101,12 @@ impl Default for State {
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fn default() -> Self {
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// default post-bootrom values
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Self {
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af: 0x01B0,
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bc: 0x0013,
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de: 0x00D8,
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hl: 0x014D,
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sp: 0xFFFE,
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pc: 0x0100,
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af: Register { as_u16: 0x01B0 },
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bc: Register { as_u16: 0x0013 },
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de: Register { as_u16: 0x00D8 },
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hl: Register { as_u16: 0x014D },
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sp: Register { as_u16: 0xFFFE },
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pc: Register { as_u16: 0x0100 },
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}
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}
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}
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@ -102,32 +117,53 @@ struct CPU {
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}
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impl CPU {
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fn exec_next(&mut self) {
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fn exec_next(&mut self) -> u8 {
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let opcode = self.next_opcode();
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let p1 = self.next_opcode();
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let p2 = self.next_opcode();
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println!("opcode: {:#X}", opcode);
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match opcode {
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0x0 => {
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// noop
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}
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0x01 => {
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self.state.bc = u8s_to_u16(&p1, &p2);
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self.state.bc.as_u8s.left = self.next_opcode();
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self.state.bc.as_u8s.right = self.next_opcode();
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}
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0x11 => {
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self.state.de.as_u8s.left = self.next_opcode();
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self.state.de.as_u8s.right = self.next_opcode();
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}
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0x21 => {
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self.state.de.as_u8s.left = self.next_opcode();
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self.state.de.as_u8s.right = self.next_opcode();
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}
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0x2C => {
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unsafe {
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self.state.hl.as_u8s.right += 1;
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};
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}
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0x66 => {
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self.state.hl = u8s_to_u16(&self.memory.get(self.state.hl), &p2);
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unsafe {
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self.state.hl.as_u8s.left = self.memory.get(self.state.hl.as_u16);
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};
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}
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0xC3 => {
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self.state.pc = u8s_to_u16(&p1, &p2);
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let (a, b) = (self.next_opcode(), self.next_opcode());
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self.state.pc.as_u8s.left = a;
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self.state.pc.as_u8s.right = b;
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}
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_ => {
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panic!("unimplemented opcode: {:#X}", opcode);
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}
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};
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return opcode;
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}
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fn next_opcode(&mut self) -> u8 {
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let opcode = self.memory.get(self.state.pc);
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self.state.pc += 0x1;
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return opcode;
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unsafe {
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let opcode = self.memory.get(self.state.pc.as_u16);
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self.state.pc.as_u16 += 0x1;
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return opcode;
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};
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}
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}
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@ -135,21 +171,17 @@ fn main() {
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let args = Args::parse();
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let rom: ROM = fs::read(args.rom).expect("Could not load ROM");
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let bootrom: ROM = fs::read(args.bootrom).expect("Could not load BootROM");
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let mut cpu = CPU {
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memory: Memory::init(rom),
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state: State::default(),
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};
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loop {
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cpu.exec_next();
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pause();
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}
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}
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fn u8s_to_u16(p1: &u8, p2: &u8) -> u16 {
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((*p1 as u16) << 8) | *p2 as u16
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}
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fn u16_to_u8s(p: &u16) -> (u8, u8) {
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let p1 = *p as u8;
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let p2 = (*p >> 8) as u8;
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(p1, p2)
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fn pause() {
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io::stdin().read_line(&mut String::new()).unwrap();
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}
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