init cpu ram properly + other minor changes
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parent
4fcde0fd82
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1 changed files with 26 additions and 1 deletions
27
src/main.rs
27
src/main.rs
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@ -83,9 +83,10 @@ impl Memory {
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// todo - switchable rom banks
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if self.bootrom_enabled && (address as usize) < self.bootrom.len() {
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return self.bootrom[address as usize];
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}
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} else {
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return self.rom[address as usize];
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}
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}
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0x8000..0xA000 => {
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return self.vram[(address - 0x8000) as usize];
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}
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@ -169,6 +170,7 @@ impl Memory {
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}
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}
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#[derive(Clone, Copy)]
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pub struct State {
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af: Register,
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bc: Register,
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@ -208,6 +210,7 @@ fn main() {
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last_instruction: 0x0,
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last_instruction_addr: 0x0,
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};
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cpu_ram_init(&mut cpu);
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#[allow(unused_variables)]
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let mut cycle_num = 0;
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match args.step_by {
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@ -253,3 +256,25 @@ fn print_cycles(cycles: &i32) {
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);
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stdout().flush().unwrap();
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}
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fn cpu_ram_init(cpu: &mut CPU) {
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cpu.memory.set(0xFF10, 0x80);
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cpu.memory.set(0xFF11, 0xBF);
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cpu.memory.set(0xFF12, 0xF3);
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cpu.memory.set(0xFF14, 0xBF);
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cpu.memory.set(0xFF16, 0x3F);
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cpu.memory.set(0xFF19, 0xBF);
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cpu.memory.set(0xFF1A, 0x7F);
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cpu.memory.set(0xFF1B, 0xFF);
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cpu.memory.set(0xFF1C, 0x9F);
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cpu.memory.set(0xFF1E, 0xBF);
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cpu.memory.set(0xFF20, 0xFF);
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cpu.memory.set(0xFF23, 0xBF);
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cpu.memory.set(0xFF24, 0x77);
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cpu.memory.set(0xFF25, 0xF3);
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cpu.memory.set(0xFF26, 0xF1);
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cpu.memory.set(0xFF40, 0x91);
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cpu.memory.set(0xFF47, 0xFC);
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cpu.memory.set(0xFF48, 0xFF);
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cpu.memory.set(0xFF49, 0xFF);
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}
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