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mbc5 ram address fix

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This commit is contained in:
Alex Janka 2023-02-23 11:24:27 +11:00
parent 9418d1e98a
commit c925beae8a
1 changed files with 3 additions and 1 deletions
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4
src/processor/memory/rom/mbcs/mbc5.rs
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@ -8,6 +8,7 @@ pub struct Mbc5 {
rom_size: usize, rom_size: usize,
ram: Option<Vec<u8>>, ram: Option<Vec<u8>>,
ram_bank: u8, ram_bank: u8,
ram_size: usize,
ram_enabled: bool, ram_enabled: bool,
} }
@ -20,6 +21,7 @@ impl Mbc5 {
rom_size: rom_banks(rom_size) * ROM_BANK_SIZE, rom_size: rom_banks(rom_size) * ROM_BANK_SIZE,
ram, ram,
ram_bank: 0, ram_bank: 0,
ram_size: ram_size_kb(ram_size).map_or(1, |s| s * KB),
ram_enabled: false, ram_enabled: false,
} }
} }
@ -36,7 +38,7 @@ impl Mbc5 {
} }
fn get_ram_addr(&self, address: Address) -> usize { fn get_ram_addr(&self, address: Address) -> usize {
address as usize + (RAM_BANK_SIZE * self.ram_bank as usize) ((address as usize - 0xA000) + (RAM_BANK_SIZE * self.ram_bank as usize)) % self.ram_size
} }
} }