diff --git a/src/processor/memory/rom/mbcs/mbc2.rs b/src/processor/memory/rom/mbcs/mbc2.rs
index 7ac4a16..079dc28 100644
--- a/src/processor/memory/rom/mbcs/mbc2.rs
+++ b/src/processor/memory/rom/mbcs/mbc2.rs
@@ -40,24 +40,32 @@ impl Mbc for Mbc2 {
     }
 
     fn get_ram(&self, address: Address) -> u8 {
-        0xF0 | (0x0F & self.ram.get((address - 0xA000) as usize % 512))
+        if self.ram_enabled {
+            0xF0 | (0x0F & self.ram.get((address - 0xA000) as usize % 512))
+        } else {
+            0xFF
+        }
     }
 
     fn set(&mut self, address: Address, data: u8) {
-        if address & (1 << 8) == (1 << 8) {
-            // bit 8 is set - rom bank
-            self.rom_bank = data & 0xF;
-            if self.rom_bank == 0 {
-                self.rom_bank = 1;
+        if address < 0x4000 {
+            if address & (1 << 8) == (1 << 8) {
+                // bit 8 is set - rom bank
+                self.rom_bank = data & 0xF;
+                if self.rom_bank == 0 {
+                    self.rom_bank = 1;
+                }
+            } else {
+                // bit 8 is clear - ram enable
+                self.ram_enabled = (data & 0xF) == 0x0A;
             }
-        } else {
-            // bit 8 is clear - ram enable
-            self.ram_enabled = data == 0x0A;
         }
     }
 
     fn set_ram(&mut self, address: Address, data: u8) {
-        self.ram.set((address - 0xA000) as usize % 512, data);
+        if self.ram_enabled {
+            self.ram.set((address - 0xA000) as usize % 512, data);
+        }
     }
 
     fn mbc_type(&self) -> String {