gb-emu/src/processor/memory.rs

use self::mmio::{Apu, Joypad, Serial};
pub use self::rom::Rom;
use crate::{processor::SplitRegister, util::set_bit, verbose_println, Cpu};
use gilrs::ConnectedGamepadsIterator;
use minifb::Key;

pub mod mmio;
pub(crate) mod rom;

pub(crate) type Address = u16;

#[allow(dead_code)]
pub struct Memory {
    bootrom: Option<Vec<u8>>,
    rom: Rom,
    vram: [u8; 8192],
    ram: [u8; 8192],
    switchable_ram: [u8; 8192],
    cpu_ram: [u8; 128],
    oam: [u8; 160],
    interrupts: u8,
    pub(super) ime: bool,
    pub(super) ime_scheduled: u8,
    io: [u8; 76],
    pub(super) user_mode: bool,
    joypad: Joypad,
    apu: Apu,
    serial: Serial,
}

impl Memory {
    pub fn init(bootrom: Option<Vec<u8>>, rom: Rom) -> Self {
        Self {
            bootrom,
            rom,
            vram: [0x0; 8192],
            ram: [0x0; 8192],
            switchable_ram: [0x0; 8192],
            cpu_ram: [0x0; 128],
            oam: [0x0; 160],
            interrupts: 0x0,
            ime: false,
            ime_scheduled: 0x0,
            io: [0xFF; 76],
            user_mode: false,
            joypad: Joypad::default(),
            apu: Apu::init_default(),
            serial: Serial::default(),
        }
    }

    pub fn get(&self, address: Address) -> u8 {
        match address {
            0x0..0x8000 => {
                // rom access
                // todo - switchable rom banks
                if let Some(bootrom) = &self.bootrom && (address as usize) < bootrom.len() {
                    bootrom[address as usize]
                } else {
                    self.rom.get(address)
                }
            }
            0x8000..0xA000 => self.vram[(address - 0x8000) as usize],
            0xA000..0xC000 => {
                // cart ram
                self.rom.get_ram(address)
            }
            0xC000..0xE000 => self.ram[(address - 0xC000) as usize],
            0xE000..0xFE00 => self.ram[(address - 0xE000) as usize],
            0xFE00..0xFEA0 => self.oam[(address - 0xFE00) as usize],
            0xFEA0..0xFF00 => 0xFF,
            0xFF00..0xFF4C => self.get_io(address),
            0xFF4C..0xFF80 => 0xFF,
            0xFF80..0xFFFF => self.cpu_ram[(address - 0xFF80) as usize],
            0xFFFF => self.interrupts,
        }
    }

    pub fn set(&mut self, address: Address, data: u8) {
        match address {
            0x0..0x8000 => {
                // change this with MBC code...
                self.rom.set(address, data);
            }
            0x8000..0xA000 => self.vram[(address - 0x8000) as usize] = data,
            0xA000..0xC000 => self.rom.set_ram(address, data),
            0xC000..0xE000 => self.ram[(address - 0xC000) as usize] = data,
            0xE000..0xFE00 => self.ram[(address - 0xE000) as usize] = data,
            0xFE00..0xFEA0 => self.oam[(address - 0xFE00) as usize] = data,
            0xFEA0..0xFF00 => {}
            0xFF00..0xFF4C => self.set_io(address, data),
            0xFF50 => self.bootrom = None,
            0xFF4C..0xFF50 | 0xFF51..0xFF80 => {}
            0xFF80..0xFFFF => self.cpu_ram[(address - 0xFF80) as usize] = data,
            0xFFFF => {
                verbose_println!("interrupts set to {:#b}", data);
                verbose_println!("                / {:#X}", data);
                self.interrupts = data;
            }
        }
    }

    fn get_io(&self, address: Address) -> u8 {
        // range: 0xFF00 - 0xFF4B inclusive
        match address {
            0xFF00 => self.joypad.as_register(),
            0xFF01 => self.serial.get_queued(),
            0xFF02 => self.serial.get_control(),
            0xFF10..0xFF40 => self.apu.get_register(address),
            _ => self.io[(address - 0xFF00) as usize],
        }
    }

    fn set_io(&mut self, address: Address, data: u8) {
        // range: 0xFF00 - 0xFF4B inclusive
        let addr_l = (address - 0xFF00) as usize;
        if !self.user_mode {
            self.io[addr_l] = data;
        } else {
            match address {
                0xFF00 => {
                    // joypad
                    self.joypad.mmio_write(data);
                }
                0xFF01 => self.serial.update_queued(data),
                0xFF02 => self.serial.update_control(data),
                0xFF04 => self.io[addr_l] = 0,
                0xFF07 => self.masked_io(addr_l, data, 0b111),
                0xFF0F => self.masked_io(addr_l, data, 0b11111),
                0xFF10..0xFF40 => self.apu.mmio_write(address, data),
                0xFF41 => {
                    // mixed read/write
                    self.masked_io(addr_l, data, 0b01111000);
                }
                0xFF03 | 0xFF08..0xFF0F | 0xFF44 => {
                    // read-only addresses
                    println!("BANNED write: {data:#X} to {address:#X}");
                }
                0xFF46 => {
                    if data > 0xDF {
                        panic!("dma transfer out of bounds: {data:#X}");
                    }
                    self.io[addr_l] = data;
                    let mut addr: u16 = 0x0;
                    addr.set_high(data);
                    for l in 0x0..0xA0 {
                        addr.set_low(l);
                        self.oam[l as usize] = self.get(addr);
                    }
                }
                0x0..0xFF00 | 0xFF4C..=u16::MAX => panic!("passed wrong address to set_io"),
                _ => self.io[addr_l] = data,
            }
        }
    }

    fn masked_io(&mut self, addr_l: usize, data: u8, mask: u8) {
        self.io[addr_l] = masked_update(self.io[addr_l], data, mask);
    }

    pub fn update_pressed_keys(
        &mut self,
        keys: Vec<Key>,
        gamepads: ConnectedGamepadsIterator,
    ) -> bool {
        self.joypad.update_pressed_keys(keys, gamepads)
    }

    pub fn div_apu_tick(&mut self) {
        self.apu.div_apu_tick();
    }

    pub(super) fn cpu_ram_init(&mut self) {
        self.set(0xFF04, 0xAD);
        self.set(0xFF10, 0x80);
        self.set(0xFF11, 0xBF);
        self.set(0xFF12, 0xF3);
        self.set(0xFF14, 0xBF);
        self.set(0xFF16, 0x3F);
        self.set(0xFF19, 0xBF);
        self.set(0xFF1A, 0x7F);
        self.set(0xFF1B, 0xFF);
        self.set(0xFF1C, 0x9F);
        self.set(0xFF1E, 0xBF);
        self.set(0xFF20, 0xFF);
        self.set(0xFF23, 0xBF);
        self.set(0xFF24, 0x77);
        self.set(0xFF25, 0xF3);
        self.set(0xFF26, 0xF1);
        self.set(0xFF40, 0x91);
        self.set(0xFF47, 0xFC);
        self.set(0xFF48, 0xFF);
        self.set(0xFF49, 0xFF);
        for i in 0xC000..0xE000 {
            self.set(i, if rand::random() { 0xFF } else { 0x00 });
        }
    }
}

impl Cpu {
    pub fn advance_mmio_clocks(&mut self, steps: usize) {
        self.memory.apu.tick(steps);
        if self.memory.serial.tick(steps) {
            self.memory.set(0xFF0F, set_bit(self.memory.get(0xFF0F), 3));
        }
    }
}

pub fn masked_update(current: u8, data: u8, mask: u8) -> u8 {
    (current & (!mask)) | (data & mask)
}