2022-10-05 12:50:48 +11:00
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# Changelog
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2022-09-28 10:09:05 +10:00
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2022-10-25 07:38:38 +11:00
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* **0.10.0:**
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* **Breaking:** Cleaned up the screenblock interface. Because they're in VRAM,
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they can't use `u8` access like they were defined to use before. Now the
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types use `u8x2`, similar to the Mode 4 bitmap.
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2022-10-25 03:54:55 +11:00
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* **0.9.3:**
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* Added `as_u32_slice` and `as_u16_slice` to `Align4`.
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* *Removed* the requirement for inputs to `include_aligned_bytes!` to be a
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multiple of 4 bytes.
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* Added `as_usize` to all the screeblock address types.
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2022-10-19 15:22:11 +11:00
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* **0.9.2:**
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* Adds support for more BIOS functions, though not all functions are as
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clearly documented as I'd like.
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2022-10-23 15:23:42 +11:00
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* Made much more of the `Fixed` type const friendly. Most ops now have an
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inherent method that is `const fn` as well as implementing the `core::ops`
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trait (the trait fn just calls the inherent fn). This means that you can't
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do `x + y` in a const context, but you can do `x.add(y)`. This is not the
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best system, but until const trait impls are stable this is the best middle
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ground.
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2022-10-18 12:13:54 +11:00
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* **0.9.1:**
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* Adds some randomization support directly into the crate.
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* Added more methods to the `Fixed` type.
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2022-10-19 02:44:23 +11:00
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* Adds an `include_aligned_bytes!` macro to pull in compile time data that's
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aligned to 4.
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2022-10-18 12:13:54 +11:00
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* **0.9.0:**
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2022-10-17 05:26:09 +11:00
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* **MSRV:** The crate now requires `compiler_builtins-0.1.81` to build. You
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will need a Nightly from 2022-10-15 or later.
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2022-10-08 13:51:31 +11:00
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* **Break:** Quite a bit of the video interface has been replaced, but it
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should be much easier to use now.
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2022-10-17 05:26:09 +11:00
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* **Break:** The timer interface has been updated so that fields more closely
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match the mGBA names, for ease of debugging.
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2022-10-08 13:51:31 +11:00
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* **0.8.0:**
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2022-10-05 12:50:48 +11:00
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* **Break:** Removed the macros for `GbaCell` access in favor of just methods.
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I had at first thought that they'd assign registers and then inline, but it
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turns out that the inline phase happens way before the register assignment
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phase, so the macros were unnecessary (and clunky).
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2022-10-07 10:23:20 +11:00
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* **Break:** The `IrqFn` type is changed to pass the function an `IrqBits`
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instead of a bare `u16`.
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2022-10-05 12:50:48 +11:00
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* Adds functions to pick a screenblock location (one for each screenblock
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type).
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* Add `BitUnPack` BIOS function.
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* Add the `CGA_8X8_THICK` art data.
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2022-10-07 17:27:49 +11:00
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* Greatly improved documentation.
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2022-09-28 10:09:05 +10:00
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* **0.7.4:** Adds mGBA logging support.
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* **0.7.3:** Fixes "multiple definition" errors with the AEABI division functions.
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Filed a PR to fix this soon:
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https://github.com/rust-lang/compiler-builtins/pull/495
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* **0.7.2:** First version that configures docs.rs properly!
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