From 7df5f4737fc95bdeb2160e0c93e5011f215041d2 Mon Sep 17 00:00:00 2001
From: Lokathor <zefria@gmail.com>
Date: Sun, 23 May 2021 19:07:26 -0600
Subject: [PATCH] should work now (Nightly e4ca1662f 2021-05-22) (#149)

---
 src/save/asm_routines.s |  4 ++--
 src/sync/statics.rs     | 16 ++++++++++++----
 2 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/src/save/asm_routines.s b/src/save/asm_routines.s
index adc3094..0595e8b 100644
--- a/src/save/asm_routines.s
+++ b/src/save/asm_routines.s
@@ -32,7 +32,7 @@ WramReadByteInner:
     .thumb_func
     .align 2
 WramVerifyBuf:
-    push {r4-r5, lr}
+    push {{r4-r5, lr}}
     movs r5, r0     @ set up r5 to be r0, so we can use it immediately for the return result
     movs r0, #0     @ set up r0 so the default return result is false
     ldr r4, =WramVerifyBufInner
@@ -55,7 +55,7 @@ WramVerifyBufInner:
     @ Returns from the function successfully
     movs r0, #1
 0:  @ Jumps to here return the function unsuccessfully, because r0 contains 0 at this point
-    pop {r4-r5, pc}
+    pop {{r4-r5, pc}}
 
     .section .text
 
diff --git a/src/sync/statics.rs b/src/sync/statics.rs
index 56cfbd3..8b8ed55 100644
--- a/src/sync/statics.rs
+++ b/src/sync/statics.rs
@@ -100,33 +100,41 @@ unsafe fn transfer_align4_arm<T: Copy>(mut dst: *mut T, mut src: *const T) {
     )
   } else if size <= 24 {
     asm!(
+      "push {{r9}}",
       "ldmia {0}!, {{r2-r5,r8-r9}}",
       "stmia {1}!, {{r2-r5,r8-r9}}",
+      "pop {{r9}}",
       inout(reg) src, inout(reg) dst,
-      out("r2") _, out("r3") _, out("r4") _, out("r5") _, out("r8") _, out("r9") _,
+      out("r2") _, out("r3") _, out("r4") _, out("r5") _, out("r8") _,
     )
   } else if size <= 28 {
     asm!(
+      "push {{r9}}",
       "ldmia {0}!, {{r2-r5,r8-r10}}",
       "stmia {1}!, {{r2-r5,r8-r10}}",
+      "pop {{r9}}",
       inout(reg) src, inout(reg) dst,
-      out("r2") _, out("r3") _, out("r4") _, out("r5") _, out("r8") _, out("r9") _,
+      out("r2") _, out("r3") _, out("r4") _, out("r5") _, out("r8") _,
       out("r10") _,
     )
   } else if size <= 32 {
     asm!(
+      "push {{r9}}",
       "ldmia {0}!, {{r2-r5,r8-r10,r12}}",
       "stmia {1}!, {{r2-r5,r8-r10,r12}}",
+      "pop {{r9}}",
       inout(reg) src, inout(reg) dst,
-      out("r2") _, out("r3") _, out("r4") _, out("r5") _, out("r8") _, out("r9") _,
+      out("r2") _, out("r3") _, out("r4") _, out("r5") _, out("r8") _,
       out("r10") _, out("r12") _,
     )
   } else if size <= 36 {
     asm!(
+      "push {{r9}}",
       "ldmia {0}!, {{r2-r5,r8-r10,r12,r14}}",
       "stmia {1}!, {{r2-r5,r8-r10,r12,r14}}",
+      "pop {{r9}}",
       inout(reg) src, inout(reg) dst,
-      out("r2") _, out("r3") _, out("r4") _, out("r5") _, out("r8") _, out("r9") _,
+      out("r2") _, out("r3") _, out("r4") _, out("r5") _, out("r8") _,
       out("r10") _, out("r12") _, out("r14") _,
     )
   } else {