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<ol class="chapter"><li><a href="../introduction.html"><strong aria-hidden="true">1.</strong> Introduction</a></li><li><a href="../ch0/index.html"><strong aria-hidden="true">2.</strong> Ch 0: Development Setup</a></li><li><a href="../ch1/index.html"><strong aria-hidden="true">3.</strong> Ch 1: Hello GBA</a></li><li><ol class="section"><li><a href="../ch1/hello1.html"><strong aria-hidden="true">3.1.</strong> hello1</a></li><li><a href="../ch1/io_registers.html"><strong aria-hidden="true">3.2.</strong> IO Registers</a></li><li><a href="../ch1/the_display_control_register.html"><strong aria-hidden="true">3.3.</strong> The Display Control Register</a></li><li><a href="../ch1/video_memory_intro.html" class="active"><strong aria-hidden="true">3.4.</strong> Video Memory Intro</a></li><li><a href="../ch1/hello2.html"><strong aria-hidden="true">3.5.</strong> hello2</a></li></ol></li><li><a href="../ch2/index.html"><strong aria-hidden="true">4.</strong> Ch 2: User Input</a></li><li><ol class="section"><li><a href="../ch2/the_key_input_register.html"><strong aria-hidden="true">4.1.</strong> The Key Input Register</a></li><li><a href="../ch2/the_vcount_register.html"><strong aria-hidden="true">4.2.</strong> The VCount Register</a></li><li><a href="../ch2/light_cycle.html"><strong aria-hidden="true">4.3.</strong> light_cycle</a></li></ol></li></ol>
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<h1 class="menu-title">Rust GBA Tutorials</h1>
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<main>
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<a class="header" href="#video-memory-intro" id="video-memory-intro"><h1>Video Memory Intro</h1></a>
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<p>The GBA's Video RAM is 96k stretching from <code>0x0600_0000</code> to <code>0x0601_7FFF</code>.</p>
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<p>The Video RAM can only be accessed totally freely during a Vertical Blank (aka
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"VBlank", though sometimes I forget and don't capitalize it properly). At other
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times, if the CPU tries to touch the same part of video memory as the display
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controller is accessing then the CPU gets bumped by a cycle to avoid a clash.</p>
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<p>Annoyingly, VRAM can only be properly written to in 16 and 32 bit segments (same
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with PALRAM and OAM). If you try to write just an 8 bit segment, then both parts
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of the 16 bit segment get the same value written to them. In other words, if you
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write the byte <code>5</code> to <code>0x0600_0000</code>, then both <code>0x0600_0000</code> and ALSO
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<code>0x0600_0001</code> will have the byte <code>5</code> in them. We have to be extra careful when
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trying to set an individual byte, and we also have to be careful if we use
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<code>memcopy</code> or <code>memset</code> as well, because they're byte oriented by default and
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don't know to follow the special rules.</p>
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<a class="header" href="#rgb15" id="rgb15"><h2>RGB15</h2></a>
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<p>As I said before, RGB15 stores a color within a <code>u16</code> value using 5 bits for
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each color channel.</p>
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<pre><pre class="playpen"><code class="language-rust">
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# #![allow(unused_variables)]
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#fn main() {
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pub const RED: u16 = 0b0_00000_00000_11111;
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pub const GREEN: u16 = 0b0_00000_11111_00000;
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pub const BLUE: u16 = 0b0_11111_00000_00000;
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#}</code></pre></pre>
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<p>In Mode 3 and Mode 5 we write direct color values into VRAM, and in Mode 4 we
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write palette index values, and then the color values go into the PALRAM.</p>
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<a class="header" href="#mode-3" id="mode-3"><h2>Mode 3</h2></a>
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<p>Mode 3 is pretty easy. We have a full resolution grid of rgb15 pixels. There's
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160 rows of 240 pixels each, with the base address being the top left corner. A
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particular pixel uses normal "2d indexing" math:</p>
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<pre><pre class="playpen"><code class="language-rust">
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# #![allow(unused_variables)]
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#fn main() {
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let row_five_col_seven = 5 + (7 * SCREEN_WIDTH);
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#}</code></pre></pre>
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<p>To draw a pixel, we just write a value at the address for the row and col that
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we want to draw to.</p>
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<a class="header" href="#mode-4" id="mode-4"><h2>Mode 4</h2></a>
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<p>Mode 4 introduces page flipping. Instead of one giant page at <code>0x0600_0000</code>,
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there's Page 0 at <code>0x0600_0000</code> and then Page 1 at <code>0x0600_A000</code>. The resolution
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for each page is the same as above, but instead of writing <code>u16</code> values, the
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memory is treated as <code>u8</code> indexes into PALRAM. The PALRAM starts at
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<code>0x0500_0000</code>, and there's enough space for 256 palette entries (each a <code>u16</code>).</p>
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<p>To set the color of a palette entry we just do a normal <code>u16</code> write_volatile.</p>
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<pre><pre class="playpen"><code class="language-rust">
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# #![allow(unused_variables)]
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#fn main() {
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(0x0500_0000 as *mut u16).offset(target_index).write_volatile(new_color)
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#}</code></pre></pre>
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<p>To draw a pixel we set the palette entry that we want the pixel to use. However,
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we must remember the "minimum size" write limitation that applies to VRAM. So,
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if we want to change just a single pixel at a time we must</p>
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<ol>
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<li>Read the full <code>u16</code> it's a part of.</li>
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<li>Clear the half of the <code>u16</code> we're going to replace</li>
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<li>Write the half of the <code>u16</code> we're going to replace with the new value</li>
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<li>Write that result back to the address.</li>
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</ol>
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<p>So, the math for finding a byte offset is the same as Mode 3 (since they're both
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a 2d grid). If the byte offset is EVEN it'll be the high bits of the <code>u16</code> at
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half the byte offset rounded down. If the offset is ODD it'll be the low bits of
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the <code>u16</code> at half the byte.</p>
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<p>Does that make sense?</p>
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<ul>
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<li>If we want to write pixel (0,0) the byte offset is 0, so we change the high
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bits of <code>u16</code> offset 0. Then we want to write to (1,0), so the byte offset is
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1, so we change the low bits of <code>u16</code> offset 0. The pixels are next to each
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other, and the target bytes are next to each other, good so far.</li>
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<li>If we want to write to (5,6) that'd be byte <code>5 + 6 * 240 = 1445</code>, so we'd
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target the low bits of <code>u16</code> offset <code>floor(1445/2) = 722</code>.</li>
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</ul>
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<p>As you can see, trying to write individual pixels in Mode 4 is mostly a bad
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time. Fret not! We don't <em>have</em> to write individual bytes. If our data is
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arranged correctly ahead of time we can just write <code>u16</code> or <code>u32</code> values
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directly. The video hardware doesn't care, it'll get along just fine.</p>
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<a class="header" href="#mode-5" id="mode-5"><h2>Mode 5</h2></a>
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<p>Mode 5 is also a two page mode, but instead of compressing the size of a pixel's
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data to fit in two pages, we compress the resolution.</p>
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<p>Mode 5 is full <code>u16</code> color, but only 160w x 128h per page.</p>
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<a class="header" href="#in-conclusion" id="in-conclusion"><h2>In Conclusion...</h2></a>
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<p>So what got written into VRAM in <code>hello1</code>?</p>
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<pre><pre class="playpen"><code class="language-rust">
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# #![allow(unused_variables)]
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#fn main() {
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(0x06000000 as *mut u16).offset(120 + 80 * 240).write_volatile(0x001F);
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(0x06000000 as *mut u16).offset(136 + 80 * 240).write_volatile(0x03E0);
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(0x06000000 as *mut u16).offset(120 + 96 * 240).write_volatile(0x7C00);
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#}</code></pre></pre>
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<p>So at pixels <code>(120,80)</code>, <code>(136,80)</code>, and <code>(120,96)</code> we write three values. Once
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again we probably need to <a href="https://www.wolframalpha.com/">convert them</a> into
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binary to make sense of it.</p>
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<ul>
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<li>0x001F: 0b11111</li>
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<li>0x03E0: 0b11111_00000</li>
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<li>0x7C00: 0b11111_00000_00000</li>
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</ul>
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<p>Ah, of course, a red pixel, a green pixel, and a blue pixel.</p>
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