From 14450da80ae88c097fb2525369dba37108397030 Mon Sep 17 00:00:00 2001 From: Robbert van der Helm Date: Sat, 20 Aug 2022 16:45:45 +0200 Subject: [PATCH] Add spectral sidechain compression to SC [2/2] Forgot to stage this in 9550fe0d10b35d2cd0ecc71ad7fbe5c00e2c1e2f. --- plugins/spectral_compressor/src/lib.rs | 67 ++++++++++++++------------ 1 file changed, 35 insertions(+), 32 deletions(-) diff --git a/plugins/spectral_compressor/src/lib.rs b/plugins/spectral_compressor/src/lib.rs index 74f5f986..4f2d2009 100644 --- a/plugins/spectral_compressor/src/lib.rs +++ b/plugins/spectral_compressor/src/lib.rs @@ -402,38 +402,41 @@ impl Plugin for SpectralCompressor { ) }, ), - compressor_bank::ThresholdMode::Sidechain => self.stft.process_overlap_add_sidechain( - buffer, - [&aux.inputs[0]], - overlap_times, - |channel_idx, sidechain_buffer_idx, real_fft_buffer| { - if sidechain_buffer_idx.is_some() { - process_stft_sidechain( - channel_idx, - real_fft_buffer, - &mut self.complex_fft_buffer, - fft_plan, - &self.window_function, - &mut self.compressor_bank, - input_gain, - ); - } else { - process_stft_main( - channel_idx, - real_fft_buffer, - &mut self.complex_fft_buffer, - fft_plan, - &self.window_function, - &self.params, - &mut self.compressor_bank, - input_gain, - output_gain, - overlap_times, - first_non_dc_bin_idx, - ) - } - }, - ), + compressor_bank::ThresholdMode::SidechainMatch + | compressor_bank::ThresholdMode::SidechainCompress => { + self.stft.process_overlap_add_sidechain( + buffer, + [&aux.inputs[0]], + overlap_times, + |channel_idx, sidechain_buffer_idx, real_fft_buffer| { + if sidechain_buffer_idx.is_some() { + process_stft_sidechain( + channel_idx, + real_fft_buffer, + &mut self.complex_fft_buffer, + fft_plan, + &self.window_function, + &mut self.compressor_bank, + input_gain, + ); + } else { + process_stft_main( + channel_idx, + real_fft_buffer, + &mut self.complex_fft_buffer, + fft_plan, + &self.window_function, + &self.params, + &mut self.compressor_bank, + input_gain, + output_gain, + overlap_times, + first_non_dc_bin_idx, + ) + } + }, + ) + } } self.dry_wet_mixer.mix_in_dry(