mirror of
https://github.com/italicsjenga/rp-hal-boards.git
synced 2024-12-25 13:31:31 +11:00
75 lines
2 KiB
Rust
75 lines
2 KiB
Rust
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//! Perform ]
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#![no_std]
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#![no_main]
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use cortex_m::prelude::{
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_embedded_hal_blocking_spi_Transfer, _embedded_hal_blocking_spi_Write,
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_embedded_hal_spi_FullDuplex,
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};
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use cortex_m_rt::entry;
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use embedded_hal::spi::MODE_0;
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use embedded_time::rate::Extensions;
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use hal::{gpio::FunctionSpi, pac, sio::Sio, spi::Spi};
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use panic_halt as _;
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use rp2040_hal as hal;
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#[link_section = ".boot2"]
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#[used]
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pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER;
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const SYS_HZ: u32 = 125_000_000_u32;
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#[entry]
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fn main() -> ! {
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let mut pac = pac::Peripherals::take().unwrap();
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let sio = Sio::new(pac.SIO);
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let pins = hal::gpio::Pins::new(
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pac.IO_BANK0,
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pac.PADS_BANK0,
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sio.gpio_bank0,
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&mut pac.RESETS,
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);
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// These are implicitly used by the spi driver if they are in the correct mode
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let _spi_sclk = pins.gpio6.into_mode::<FunctionSpi>();
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let _spi_mosi = pins.gpio7.into_mode::<FunctionSpi>();
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let _spi_miso = pins.gpio4.into_mode::<FunctionSpi>();
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let mut spi = Spi::<_, _, 8>::new(pac.SPI0).init(
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&mut pac.RESETS,
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SYS_HZ.Hz(),
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16_000_000u32.Hz(),
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&MODE_0,
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);
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// Write out 0, ignore return value
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if let Ok(..) = spi.write(&[0]) {
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// Handle success
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};
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// write 50, then check the return
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let send_success = spi.send(50);
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match send_success {
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Ok(_) => {
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// We succeeded, check the read value
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if spi.read().is_ok() {
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// Output our read value
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};
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}
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Err(_) => todo!(),
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}
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// Do a read+write at the same time.
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// Data in read_write_cache will be replaced with the read data
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let mut read_write_cache: [u8; 4] = [1, 2, 3, 4];
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let transfer_success = spi.transfer(&mut read_write_cache);
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#[allow(clippy::single_match)]
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match transfer_success {
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Ok(_) => {} // Handle success
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Err(_) => {} // handle errors
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};
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#[allow(clippy::empty_loop)]
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loop {}
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}
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