Fix some clippy warnings flagged by current beta (#505)

* Fix some clippy warnings flagged by current beta

(One warning was just silenced because I consider the current code more readable)

* cargo fmt
This commit is contained in:
Jan Niehusmann 2022-11-25 18:08:20 +01:00 committed by GitHub
parent d1377acc19
commit 0055dbaf87
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GPG key ID: 4AEE18F83AFDEB23
7 changed files with 10 additions and 21 deletions

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@ -270,15 +270,7 @@ impl PicoExplorer {
pub fn get_adc<Pin: Channel<Adc, ID = u8>>(&mut self, channel: &mut Pin) -> f32 { pub fn get_adc<Pin: Channel<Adc, ID = u8>>(&mut self, channel: &mut Pin) -> f32 {
// scale raw 12-bit adc value to 0 .. 1 float // scale raw 12-bit adc value to 0 .. 1 float
let adc_value: u16 = self.adc.read(channel).unwrap(); let adc_value: u16 = self.adc.read(channel).unwrap();
let mut result: f32 = f32::from(adc_value) / f32::from(1u16 << 12); let result: f32 = f32::from(adc_value) / f32::from(1u16 << 12);
// clamp result to 0 .. 1 result.clamp(0.0, 1.0)
if result > 1.0 {
result = 1.0
}
if result < 0.0 {
result = 0.0
}
result
} }
} }

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@ -8,7 +8,6 @@ mod app {
use embedded_hal::digital::v2::OutputPin; use embedded_hal::digital::v2::OutputPin;
use fugit::ExtU64; use fugit::ExtU64;
use fugit::MicrosDurationU32;
use rp_pico::{ use rp_pico::{
hal::{ hal::{
self, self,
@ -20,8 +19,6 @@ mod app {
XOSC_CRYSTAL_FREQ, XOSC_CRYSTAL_FREQ,
}; };
const SCAN_TIME_US: MicrosDurationU32 = MicrosDurationU32::secs(1);
#[shared] #[shared]
struct Shared { struct Shared {
led: hal::gpio::Pin<hal::gpio::pin::bank0::Gpio25, hal::gpio::PushPullOutput>, led: hal::gpio::Pin<hal::gpio::pin::bank0::Gpio25, hal::gpio::PushPullOutput>,

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@ -216,7 +216,7 @@ impl<P: PIOExt> PIO<P> {
}); });
self.used_instruction_space |= Self::instruction_mask(p.code.len()) << offset; self.used_instruction_space |= Self::instruction_mask(p.code.len()) << offset;
Ok(InstalledProgram { Ok(InstalledProgram {
offset: offset as u8, offset,
length: p.code.len() as u8, length: p.code.len() as u8,
side_set: p.side_set, side_set: p.side_set,
wrap: p.wrap, wrap: p.wrap,
@ -2028,9 +2028,8 @@ impl<P: PIOExt> PIOBuilder<P> {
w.out_sticky().bit(self.out_sticky); w.out_sticky().bit(self.out_sticky);
w.wrap_top().bits(offset as u8 + self.program.wrap.source); w.wrap_top().bits(offset + self.program.wrap.source);
w.wrap_bottom() w.wrap_bottom().bits(offset + self.program.wrap.target);
.bits(offset as u8 + self.program.wrap.target);
let n = match self.mov_status { let n = match self.mov_status {
MovStatusConfig::Tx(n) => { MovStatusConfig::Tx(n) => {
@ -2085,7 +2084,7 @@ impl<P: PIOExt> PIOBuilder<P> {
// to the beginning of the program we loaded in. // to the beginning of the program we loaded in.
let instr = InstructionOperands::JMP { let instr = InstructionOperands::JMP {
condition: pio::JmpCondition::Always, condition: pio::JmpCondition::Always,
address: offset as u8, address: offset,
} }
.encode(); .encode();
// Safety: Only instance owning the SM // Safety: Only instance owning the SM

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@ -157,7 +157,7 @@ impl SioFifo {
// Write the value to the FIFO - the other core will now be able to // Write the value to the FIFO - the other core will now be able to
// pop it off its end of the FIFO. // pop it off its end of the FIFO.
self.write(value as u32); self.write(value);
// Fire off an event to the other core // Fire off an event to the other core
cortex_m::asm::sev(); cortex_m::asm::sev();

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@ -158,7 +158,7 @@ impl<D: SpiDevice, const DS: u8> Spi<Disabled, D, DS> {
self.device.reset_bring_up(resets); self.device.reset_bring_up(resets);
self.set_baudrate(peri_frequency, baudrate); self.set_baudrate(peri_frequency, baudrate);
self.set_format(DS as u8, mode); self.set_format(DS, mode);
// Always enable DREQ signals -- harmless if DMA is not listening // Always enable DREQ signals -- harmless if DMA is not listening
self.device self.device
.sspdmacr .sspdmacr

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@ -280,7 +280,7 @@ fn configure_baudrate(
// First we load the integer part of the divider. // First we load the integer part of the divider.
device.uartibrd.write(|w| unsafe { device.uartibrd.write(|w| unsafe {
w.baud_divint().bits(baud_div_int as u16); w.baud_divint().bits(baud_div_int);
w w
}); });

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@ -124,6 +124,7 @@ use usb_device::{
#[cfg(feature = "rp2040-e5")] #[cfg(feature = "rp2040-e5")]
mod errata5; mod errata5;
#[allow(clippy::bool_to_int_with_if)]
fn ep_addr_to_ep_buf_ctrl_idx(ep_addr: EndpointAddress) -> usize { fn ep_addr_to_ep_buf_ctrl_idx(ep_addr: EndpointAddress) -> usize {
ep_addr.index() * 2 + (if ep_addr.is_in() { 0 } else { 1 }) ep_addr.index() * 2 + (if ep_addr.is_in() { 0 } else { 1 })
} }