mirror of
https://github.com/italicsjenga/rp-hal-boards.git
synced 2024-12-23 20:51:31 +11:00
parent
fae1caaca9
commit
199ad891ed
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@ -13,6 +13,12 @@ license = "MIT OR Apache-2.0"
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cortex-m = "0.7.2"
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rp2040-hal = { path = "../../rp2040-hal", version = "0.2.0"}
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cortex-m-rt = { version = "0.6.14", optional = true }
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embedded-time = "0.12.0"
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[dev-dependencies]
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panic-halt= "0.2.0"
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embedded-hal ="0.2.5"
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rp2040-boot2 = { git = "https://github.com/rp-rs/rp2040-boot2-rs", rev = "d2128ef9875e91e454dd0fb0d747c7439ae0627b" }
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[features]
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default = ["rt"]
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1
boards/feather_rp2040/README.md
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1
boards/feather_rp2040/README.md
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@ -0,0 +1 @@
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Adafruit Feather RP2040 Board Support Crate
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60
boards/feather_rp2040/examples/feather_blinky.rs
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60
boards/feather_rp2040/examples/feather_blinky.rs
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@ -0,0 +1,60 @@
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//! Blinks the LED on a Adafruit Feather RP2040 board
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//!
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//! This will blink on-board LED.
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#![no_std]
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#![no_main]
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use cortex_m_rt::entry;
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use embedded_hal::digital::v2::OutputPin;
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use embedded_time::rate::*;
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use feather_rp2040::{
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hal::{
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clocks::{init_clocks_and_plls, Clock},
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pac,
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sio::Sio,
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watchdog::Watchdog,
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},
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Pins, XOSC_CRYSTAL_FREQ,
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};
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use panic_halt as _;
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#[link_section = ".boot2"]
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#[used]
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pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GD25Q64CS;
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#[entry]
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fn main() -> ! {
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let mut pac = pac::Peripherals::take().unwrap();
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let core = pac::CorePeripherals::take().unwrap();
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let mut watchdog = Watchdog::new(pac.WATCHDOG);
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let clocks = init_clocks_and_plls(
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XOSC_CRYSTAL_FREQ,
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pac.XOSC,
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pac.CLOCKS,
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pac.PLL_SYS,
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pac.PLL_USB,
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&mut pac.RESETS,
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&mut watchdog,
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)
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.ok()
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.unwrap();
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let mut delay = cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().integer());
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let sio = Sio::new(pac.SIO);
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let pins = Pins::new(
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pac.IO_BANK0,
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pac.PADS_BANK0,
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sio.gpio_bank0,
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&mut pac.RESETS,
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);
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let mut led_pin = pins.d13.into_push_pull_output();
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loop {
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led_pin.set_high().unwrap();
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delay.delay_ms(1500);
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led_pin.set_low().unwrap();
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delay.delay_ms(1500);
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}
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}
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@ -1,6 +1,6 @@
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#![no_std]
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extern crate rp2040_hal as hal;
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pub extern crate rp2040_hal as hal;
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#[cfg(feature = "rt")]
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extern crate cortex_m_rt;
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@ -54,3 +54,5 @@ hal::bsp_pins!(
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Gpio28 { name: a2 },
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Gpio29 { name: a3 },
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);
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pub const XOSC_CRYSTAL_FREQ: u32 = 12_000_000;
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