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pio: Rename read_rx/write_tx to read/write.

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Mathias Gottschlag 2021-10-01 08:47:16 +02:00
parent 207f5aebdb
commit 2fc42e07f2
1 changed files with 2 additions and 2 deletions
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4
rp2040-hal/src/pio.rs
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@ -626,7 +626,7 @@ impl<SM: ValidStateMachine> Rx<SM> {
/// Get the next element from RX FIFO. /// Get the next element from RX FIFO.
/// ///
/// Returns `None` if the FIFO is empty. /// Returns `None` if the FIFO is empty.
pub fn read_rx(&mut self) -> Option<u32> { pub fn read(&mut self) -> Option<u32> {
// Safety: The register is never written by software. // Safety: The register is never written by software.
let is_empty = unsafe { &*self.block }.fstat.read().rxempty().bits() & (1 << SM::id()) != 0; let is_empty = unsafe { &*self.block }.fstat.read().rxempty().bits() & (1 << SM::id()) != 0;
@ -649,7 +649,7 @@ impl<SM: ValidStateMachine> Tx<SM> {
/// Write an element to TX FIFO. /// Write an element to TX FIFO.
/// ///
/// Returns `true` if the value was written to FIFO, `false` otherwise. /// Returns `true` if the value was written to FIFO, `false` otherwise.
pub fn write_tx(&mut self, value: u32) -> bool { pub fn write(&mut self, value: u32) -> bool {
// Safety: The register is never written by software. // Safety: The register is never written by software.
let is_full = unsafe { &*self.block }.fstat.read().txfull().bits() & (1 << SM::id()) != 0; let is_full = unsafe { &*self.block }.fstat.read().txfull().bits() & (1 << SM::id()) != 0;