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Change divider delay to explicit NOPs
Use explicit NOPs since cortex_m::asm::delay actually delays for longer than we need to.
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@ -215,6 +215,21 @@ where
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}
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}
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}
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}
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// Don't use cortex_m::asm::delay(8) because that ends up delaying 15 cycles
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// on Cortex-M0. Each iteration of the inner loop is 3 cycles and it adds
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// one extra iteration.
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#[inline(always)]
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fn divider_delay() {
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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}
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impl HwDivider {
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impl HwDivider {
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/// Perform hardware unsigned divide/modulo operation
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/// Perform hardware unsigned divide/modulo operation
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pub fn unsigned(&self, dividend: u32, divisor: u32) -> DivResult<u32> {
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pub fn unsigned(&self, dividend: u32, divisor: u32) -> DivResult<u32> {
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@ -222,7 +237,7 @@ impl HwDivider {
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sio.div_udividend.write(|w| unsafe { w.bits(dividend) });
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sio.div_udividend.write(|w| unsafe { w.bits(dividend) });
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sio.div_udivisor.write(|w| unsafe { w.bits(divisor) });
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sio.div_udivisor.write(|w| unsafe { w.bits(divisor) });
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cortex_m::asm::delay(8);
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divider_delay();
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// Note: quotient must be read last
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// Note: quotient must be read last
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let remainder = sio.div_remainder.read().bits();
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let remainder = sio.div_remainder.read().bits();
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@ -243,7 +258,7 @@ impl HwDivider {
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sio.div_sdivisor
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sio.div_sdivisor
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.write(|w| unsafe { w.bits(divisor as u32) });
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.write(|w| unsafe { w.bits(divisor as u32) });
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cortex_m::asm::delay(8);
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divider_delay();
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// Note: quotient must be read last
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// Note: quotient must be read last
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let remainder = sio.div_remainder.read().bits() as i32;
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let remainder = sio.div_remainder.read().bits() as i32;
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