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Merge pull request #488 from ptpaterson/eh1_0_alpha-spi
implement embedded-hal aplha SPI traits
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commit
5ae1f90939
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@ -230,7 +230,91 @@ macro_rules! impl_write {
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type Error = Infallible;
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type Error = Infallible;
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}
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}
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/* disabled for now - nb was migrated to separate crate
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#[cfg(feature = "eh1_0_alpha")]
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impl<D: SpiDevice> eh1::SpiBusFlush for Spi<Enabled, D, $nr> {
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fn flush(&mut self) -> Result<(), Self::Error> {
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while self.is_busy() {}
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Ok(())
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}
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}
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#[cfg(feature = "eh1_0_alpha")]
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impl<D: SpiDevice> eh1::SpiBusRead<$type> for Spi<Enabled, D, $nr> {
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fn read(&mut self, words: &mut [$type]) -> Result<(), Self::Error> {
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for word in words.iter_mut() {
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// write empty word
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while !self.is_writable() {}
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self.device
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.sspdr
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.write(|w| unsafe { w.data().bits(0) });
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// read one word
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while !self.is_readable() {}
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*word = self.device.sspdr.read().data().bits() as $type;
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}
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Ok(())
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}
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}
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#[cfg(feature = "eh1_0_alpha")]
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impl<D: SpiDevice> eh1::SpiBusWrite<$type> for Spi<Enabled, D, $nr> {
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fn write(&mut self, words: &[$type]) -> Result<(), Self::Error> {
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for word in words.iter() {
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// write one word
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while !self.is_writable() {}
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self.device
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.sspdr
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.write(|w| unsafe { w.data().bits(*word as u16) });
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// drop read wordd
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while !self.is_readable() {}
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let _ = self.device.sspdr.read().data().bits();
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}
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Ok(())
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}
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}
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#[cfg(feature = "eh1_0_alpha")]
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impl<D: SpiDevice> eh1::SpiBus<$type> for Spi<Enabled, D, $nr> {
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fn transfer(&mut self, read: &mut [$type], write: &[$type]) -> Result<(), Self::Error>{
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let len = read.len().max(write.len());
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for i in 0..len {
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// write one word. Send empty word if buffer is empty.
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let wb = write.get(i).copied().unwrap_or(0);
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while !self.is_writable() {}
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self.device
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.sspdr
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.write(|w| unsafe { w.data().bits(wb as u16) });
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// read one word. Drop extra words if buffer is full.
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while !self.is_readable() {}
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let rb = self.device.sspdr.read().data().bits() as $type;
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if let Some(r) = read.get_mut(i) {
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*r = rb;
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}
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}
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Ok(())
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}
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fn transfer_in_place(&mut self, words: &mut [$type]) -> Result<(), Self::Error>{
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for word in words.iter_mut() {
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// write one word
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while !self.is_writable() {}
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self.device
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.sspdr
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.write(|w| unsafe { w.data().bits(*word as u16) });
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// read one word
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while !self.is_readable() {}
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*word = self.device.sspdr.read().data().bits() as $type;
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}
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Ok(())
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}
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}
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/* disabled for now - nb was migrated to separate crate
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#[cfg(feature = "eh1_0_alpha")]
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#[cfg(feature = "eh1_0_alpha")]
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impl<D: SpiDevice> eh1::nb::FullDuplex<$type> for Spi<Enabled, D, $nr> {
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impl<D: SpiDevice> eh1::nb::FullDuplex<$type> for Spi<Enabled, D, $nr> {
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fn read(&mut self) -> Result<$type, nb::Error<Infallible>> {
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fn read(&mut self) -> Result<$type, nb::Error<Infallible>> {
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