diff --git a/rp2040-hal/src/pll.rs b/rp2040-hal/src/pll.rs index 02e8537..849736e 100644 --- a/rp2040-hal/src/pll.rs +++ b/rp2040-hal/src/pll.rs @@ -54,7 +54,7 @@ impl PhaseLockedLoop { fn transition(self, state: To) -> PhaseLockedLoop { PhaseLockedLoop { device: self.device, - state: state, + state, } } @@ -131,7 +131,8 @@ impl PhaseLockedLoop { where R: Into>, { - const VCO_FREQ_RANGE: RangeInclusive> = Hertz(400_000_000)..=Hertz(1600_000_000); + const VCO_FREQ_RANGE: RangeInclusive> = + Hertz(400_000_000)..=Hertz(1_600_000_000); const POSTDIV_RANGE: Range = 1..7; const FBDIV_RANGE: Range = 16..320;