alex/rp-hal-boards
1
0
Fork 0
mirror of https://github.com/italicsjenga/rp-hal-boards.git synced 2025-01-10 04:21:32 +11:00
Code Issues Packages Projects Releases Wiki Activity

Remove unmaintained implementation async i2c.

Browse source
This commit is contained in:
Wilfried Chauveau 2022-04-17 22:39:31 +01:00 committed by 9names
parent e9a4f7e40b
commit 977bc2732a
5 changed files with 4 additions and 238 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
rp2040-hal/CHANGELOG.md
View file

@ -7,6 +7,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
## [Unreleased]
### Removed
- removed i2c embassy driver prototype
## [0.4.0] - 2022-03-09
### Added

14
rp2040-hal/Cargo.toml
View file

@ -30,17 +30,6 @@ critical-section = { version = "0.2.4", features = ["custom-impl"] }
futures = { version = "0.3", default-features = false, optional = true }
chrono = { version = "0.4", default-features = false, optional = true }
# namespaced features will let us use "dep:embassy-traits" in the features rather than using this
# trick of renaming the crate.
#
# This is commented out so that we can publish to crates.io
#
# [dependencies.embassy_traits]
# git = "https://github.com/embassy-rs/embassy"
# rev = "6d6e6f55b8a9ecd38b5a6d3bb11f74b2654afdeb"
# package = "embassy-traits"
# optional = true
[dev-dependencies]
cortex-m-rt = "0.7"
panic-halt = "0.2.0"
@ -51,9 +40,6 @@ dht-sensor = "0.2.1"
[features]
rt = ["rp2040-pac/rt"]
# This is commented out so that we can publish to crates.io
#
# embassy-traits = ["embassy_traits", "futures"]
alloc = []
rom-func-cache = []
disable-intrinsics = []

3
rp2040-hal/src/i2c/controller.rs
View file

@ -14,9 +14,6 @@ use eh1_0_alpha::i2c as eh1;
use super::{i2c_reserved_addr, Controller, Error, SclPin, SdaPin, I2C};
#[cfg(feature = "embassy-traits")]
mod embassy_support;
impl<T: SubsystemReset + Deref<Target = Block>, Sda: PinId + BankPinId, Scl: PinId + BankPinId>
I2C<T, (Pin<Sda, FunctionI2C>, Pin<Scl, FunctionI2C>), Controller>
{

219
rp2040-hal/src/i2c/controller/embassy_support.rs
View file

@ -1,219 +0,0 @@
use core::{future::Future, iter::Peekable, ops::Deref, task::Poll};
use super::{Block, Controller, Error, I2C};
impl<T: Deref<Target = Block>, PINS> I2C<T, PINS, Controller> {
async fn non_blocking_read_internal<'a, U: Iterator<Item = &'a mut u8> + 'a>(
&mut self,
mut buffer: Peekable<U>,
) -> Result<(), Error> {
let mut first = true;
while let Some(byte) = buffer.next() {
let last = buffer.peek().is_none();
// wait until there is space in the FIFO to write the next byte
block_on(|| {
if self.tx_fifo_full() {
Poll::Pending
} else {
Poll::Ready(())
}
})
.await;
self.i2c.ic_data_cmd.write(|w| {
if first {
w.restart().enable();
first = false;
} else {
w.restart().disable();
}
if last {
w.stop().enable();
} else {
w.stop().disable();
}
w.cmd().read()
});
block_on(|| {
if let Some(abort_reason) = self.read_and_clear_abort_reason() {
Poll::Ready(Err(Error::Abort(abort_reason)))
} else if self.i2c.ic_rxflr.read().bits() != 0 {
Poll::Ready(Ok(()))
} else {
Poll::Pending
}
})
.await?;
*byte = self.i2c.ic_data_cmd.read().dat().bits();
}
Ok(())
}
async fn non_blocking_write_internal(
&mut self,
bytes: impl IntoIterator<Item = u8>,
do_stop: bool,
) -> Result<(), Error> {
let mut bytes = bytes.into_iter().peekable();
while let Some(byte) = bytes.next() {
let last = bytes.peek().is_none();
self.i2c.ic_data_cmd.write(|w| {
if do_stop && last {
w.stop().enable();
} else {
w.stop().disable();
}
unsafe { w.dat().bits(byte) }
});
// Wait until the transmission of the address/data from the internal
// shift register has completed. For this to function correctly, the
// TX_EMPTY_CTRL flag in IC_CON must be set. The TX_EMPTY_CTRL flag
// was set in i2c_init.
block_on(|| {
if self.i2c.ic_raw_intr_stat.read().tx_empty().is_inactive() {
Poll::Pending
} else {
Poll::Ready(())
}
})
.await;
let abort_reason = self.read_and_clear_abort_reason();
if abort_reason.is_some() || (do_stop && last) {
// If the transaction was aborted or if it completed
// successfully wait until the STOP condition has occured.
block_on(|| {
if self.i2c.ic_raw_intr_stat.read().stop_det().is_inactive() {
Poll::Pending
} else {
Poll::Ready(())
}
})
.await;
self.i2c.ic_clr_stop_det.read().clr_stop_det();
}
// Note the hardware issues a STOP automatically on an abort condition.
// Note also the hardware clears RX FIFO as well as TX on abort,
// ecause we set hwparam IC_AVOID_RX_FIFO_FLUSH_ON_TX_ABRT to 0.
if let Some(abort_reason) = abort_reason {
return Err(Error::Abort(abort_reason));
}
}
Ok(())
}
}
async fn block_on<F: FnMut() -> Poll<T>, T>(mut f: F) -> T {
futures::future::poll_fn(|cx| {
// always ready to scan
cx.waker().wake_by_ref();
f()
})
.await
}
impl<T, PINS, A> embassy_traits::i2c::I2c<A> for I2C<T, PINS, Controller>
where
T: Deref<Target = Block>,
A: embassy_traits::i2c::AddressMode + 'static + Into<u16>,
{
type Error = Error;
#[rustfmt::skip]
type WriteFuture<'a>
where
Self: 'a = impl Future<Output = Result<(), Self::Error>> + 'a;
#[rustfmt::skip]
type ReadFuture<'a>
where
Self: 'a = impl Future<Output = Result<(), Self::Error>> + 'a;
#[rustfmt::skip]
type WriteReadFuture<'a>
where
Self: 'a = impl Future<Output = Result<(), Self::Error>> + 'a;
fn read<'a>(&'a mut self, address: A, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
let mut buffer = buffer.iter_mut().peekable();
let addr: u16 = address.into();
async move {
self.setup(addr);
Self::validate(addr, None, Some(buffer.peek().is_none()))?;
self.non_blocking_read_internal(buffer).await
}
}
fn write<'a>(&'a mut self, address: A, bytes: &'a [u8]) -> Self::WriteFuture<'a> {
async move {
let addr: u16 = address.into();
Self::validate(addr, Some(bytes.is_empty()), None)?;
self.setup(addr);
self.non_blocking_write_internal(bytes.iter().cloned(), true)
.await
}
}
fn write_read<'a>(
&'a mut self,
address: A,
bytes: &'a [u8],
buffer: &'a mut [u8],
) -> Self::WriteReadFuture<'a> {
async move {
let addr: u16 = address.into();
Self::validate(addr, Some(bytes.is_empty()), Some(buffer.is_empty()))?;
self.setup(addr);
self.non_blocking_write_internal(bytes.iter().cloned(), false)
.await?;
self.non_blocking_read_internal(buffer.iter_mut().peekable())
.await
}
}
}
impl<T, PINS, A> embassy_traits::i2c::WriteIter<A> for I2C<T, PINS, Controller>
where
T: Deref<Target = Block>,
A: embassy_traits::i2c::AddressMode + 'static + Into<u16>,
{
type Error = Error;
#[rustfmt::skip]
type WriteIterFuture<'a, U>
where
U: 'a + IntoIterator<Item = u8>,
Self: 'a = impl Future<Output = Result<(), Self::Error>> + 'a;
fn write_iter<'a, U>(&'a mut self, address: A, bytes: U) -> Self::WriteIterFuture<'a, U>
where
U: IntoIterator<Item = u8> + 'a,
{
let addr: u16 = address.into();
async move {
let mut bytes = bytes.into_iter().peekable();
Self::validate(addr, Some(bytes.peek().is_none()), None)?;
self.setup(addr);
self.non_blocking_write_internal(bytes, true).await
}
}
}

2
rp2040-hal/src/lib.rs
View file

@ -5,8 +5,6 @@
#![warn(missing_docs)]
#![no_std]
#![cfg_attr(feature = "embassy-traits", feature(generic_associated_types))]
#![cfg_attr(feature = "embassy-traits", feature(type_alias_impl_trait))]
extern crate cortex_m;
extern crate embedded_hal as hal;