From bcfbd72ed116d99610e61cde34f02450c2e8f17d Mon Sep 17 00:00:00 2001 From: Hmvp Date: Mon, 26 Jul 2021 21:16:09 +0200 Subject: [PATCH] Update embedded time --- boards/pico/Cargo.toml | 2 +- boards/pico/examples/pico_blinky.rs | 2 +- boards/pico/examples/pico_pwm_blink.rs | 2 +- rp2040-hal/Cargo.toml | 2 +- rp2040-hal/src/clocks/macros.rs | 6 +++--- rp2040-hal/src/pll.rs | 4 ++-- rp2040-hal/src/spi.rs | 4 ++-- rp2040-hal/src/uart.rs | 4 ++-- rp2040-hal/src/xosc.rs | 4 ++-- 9 files changed, 15 insertions(+), 15 deletions(-) diff --git a/boards/pico/Cargo.toml b/boards/pico/Cargo.toml index 695b0f7..0d6cef4 100644 --- a/boards/pico/Cargo.toml +++ b/boards/pico/Cargo.toml @@ -13,7 +13,7 @@ license = "MIT OR Apache-2.0" cortex-m = "0.7.2" rp2040-hal = { path = "../../rp2040-hal", version = "0.1.0" } cortex-m-rt = { version = "0.6.14", optional = true } -embedded-time = "0.10.1" +embedded-time = "0.12.0" [dev-dependencies] panic-halt= "0.2.0" diff --git a/boards/pico/examples/pico_blinky.rs b/boards/pico/examples/pico_blinky.rs index a0d7060..a75d3bb 100644 --- a/boards/pico/examples/pico_blinky.rs +++ b/boards/pico/examples/pico_blinky.rs @@ -40,7 +40,7 @@ fn main() -> ! { .ok() .unwrap(); - let mut delay = cortex_m::delay::Delay::new(core.SYST, *clocks.system_clock.freq().integer()); + let mut delay = cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().integer()); let sio = Sio::new(pac.SIO); let pins = Pins::new( diff --git a/boards/pico/examples/pico_pwm_blink.rs b/boards/pico/examples/pico_pwm_blink.rs index 0ace6cb..37848e6 100644 --- a/boards/pico/examples/pico_pwm_blink.rs +++ b/boards/pico/examples/pico_pwm_blink.rs @@ -44,7 +44,7 @@ fn main() -> ! { .ok() .unwrap(); - let mut delay = cortex_m::delay::Delay::new(core.SYST, *clocks.system_clock.freq().integer()); + let mut delay = cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().integer()); let mut pwm_pin = Pwm4::new(25); diff --git a/rp2040-hal/Cargo.toml b/rp2040-hal/Cargo.toml index f23c6a5..a35728c 100644 --- a/rp2040-hal/Cargo.toml +++ b/rp2040-hal/Cargo.toml @@ -12,7 +12,7 @@ license = "MIT OR Apache-2.0" [dependencies] cortex-m = "0.7.2" embedded-hal = { version = "0.2.5", features=["unproven"] } -embedded-time = "0.10" +embedded-time = "0.12.0" nb = "1.0" rp2040-pac = { git = "https://github.com/rp-rs/rp2040-pac", branch="main" } paste = "1.0" diff --git a/rp2040-hal/src/clocks/macros.rs b/rp2040-hal/src/clocks/macros.rs index 31033ea..fc75261 100644 --- a/rp2040-hal/src/clocks/macros.rs +++ b/rp2040-hal/src/clocks/macros.rs @@ -191,7 +191,7 @@ macro_rules! clock { let div = if freq.eq(&src_freq) { 1 << 8 } else { - *(shifted_src_freq / *freq.integer() as u64).integer() as u32 + (shifted_src_freq / freq.integer() as u64).integer() as u32 }; // If increasing divisor, set divisor before source. Otherwise set source @@ -348,7 +348,7 @@ macro_rules! stoppable_clock { let div = if freq.eq(&src_freq) { 1 << 8 } else { - *(shifted_src_freq / *freq.integer() as u64).integer() as u32 + (shifted_src_freq / freq.integer() as u64).integer() as u32 }; // If increasing divisor, set divisor before source. Otherwise set source @@ -370,7 +370,7 @@ macro_rules! stoppable_clock { // Note XOSC_COUNT is not helpful here because XOSC is not // necessarily running, nor is timer... so, 3 cycles per loop: let sys_freq = 125_000_000; // TODO get actual sys_clk frequency - let delay_cyc = sys_freq / *self.frequency.integer() + 1u32; + let delay_cyc = sys_freq / self.frequency.integer() + 1u32; cortex_m::asm::delay(delay_cyc); } diff --git a/rp2040-hal/src/pll.rs b/rp2040-hal/src/pll.rs index db238e5..ae579d1 100644 --- a/rp2040-hal/src/pll.rs +++ b/rp2040-hal/src/pll.rs @@ -173,10 +173,10 @@ impl PhaseLockedLoop { } let fbdiv = vco_freq - .checked_div(ref_freq_hz.integer()) + .checked_div(&ref_freq_hz.integer()) .ok_or(Error::BadArgument)?; - let fbdiv: u16 = (*fbdiv.integer()) + let fbdiv: u16 = (fbdiv.integer()) .try_into() .map_err(|_| Error::BadArgument)?; diff --git a/rp2040-hal/src/spi.rs b/rp2040-hal/src/spi.rs index ae348ef..cc36f04 100644 --- a/rp2040-hal/src/spi.rs +++ b/rp2040-hal/src/spi.rs @@ -85,8 +85,8 @@ impl Spi { peri_frequency: F, baudrate: B, ) -> Hertz { - let freq_in = *peri_frequency.into().integer(); - let baudrate = *baudrate.into().integer(); + let freq_in = peri_frequency.into().integer(); + let baudrate = baudrate.into().integer(); let mut prescale: u8 = u8::MAX; let mut postdiv: u8 = 1; diff --git a/rp2040-hal/src/uart.rs b/rp2040-hal/src/uart.rs index 080a368..71b1f3b 100644 --- a/rp2040-hal/src/uart.rs +++ b/rp2040-hal/src/uart.rs @@ -371,7 +371,7 @@ fn calculate_baudrate_dividers( let baudrate_div = frequency .integer() .checked_mul(8) - .and_then(|r| r.checked_div(*wanted_baudrate.integer())) + .and_then(|r| r.checked_div(wanted_baudrate.integer())) .ok_or(Error::BadArgument)?; Ok(match (baudrate_div >> 7, ((baudrate_div & 0x7F) + 1) / 2) { @@ -408,7 +408,7 @@ fn configure_baudrate( device.uartlcr_h.modify(|_, w| w); Ok(Baud( - (4 * *frequency.integer()) / (64 * baud_div_int + baud_div_frac) as u32, + (4 * frequency.integer()) / (64 * baud_div_int + baud_div_frac) as u32, )) } diff --git a/rp2040-hal/src/xosc.rs b/rp2040-hal/src/xosc.rs index 6f67b1e..31f8aa3 100644 --- a/rp2040-hal/src/xosc.rs +++ b/rp2040-hal/src/xosc.rs @@ -113,12 +113,12 @@ impl CrystalOscillator { //See Chapter 2, Section 16, ยง3) //We do the calculation first. let startup_delay = frequency - .checked_div(delay_to_hz.integer()) + .checked_div(&delay_to_hz.integer()) .and_then(|r| r.to_generic::(DIVIDER).ok()) .ok_or(Error::BadArgument)?; //Then we check if it fits into an u16. - let startup_delay: u16 = (*startup_delay.integer()) + let startup_delay: u16 = (startup_delay.integer()) .try_into() .map_err(|_| Error::BadArgument)?;