mirror of
https://github.com/italicsjenga/rp-hal-boards.git
synced 2024-12-24 21:21:31 +11:00
Added reader/writer split to UartPeripheral
This commit is contained in:
parent
84b8fb05b0
commit
c41c273131
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@ -35,11 +35,15 @@
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mod peripheral;
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mod peripheral;
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mod pins;
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mod pins;
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mod reader;
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mod utils;
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mod utils;
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mod writer;
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pub use self::peripheral::UartPeripheral;
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pub use self::peripheral::UartPeripheral;
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pub use self::pins::*;
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pub use self::pins::*;
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pub use self::reader::{ReadError, ReadErrorType, Reader};
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pub use self::utils::*;
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pub use self::utils::*;
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pub use self::writer::Writer;
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/// Common configurations for UART.
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/// Common configurations for UART.
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pub mod common_configs;
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pub mod common_configs;
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@ -39,6 +39,7 @@ use embedded_time::fixed_point::FixedPoint;
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use embedded_time::rate::Baud;
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use embedded_time::rate::Baud;
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use embedded_time::rate::Hertz;
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use embedded_time::rate::Hertz;
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use nb::Error::{Other, WouldBlock};
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use nb::Error::{Other, WouldBlock};
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use rp2040_pac::{UART0, UART1};
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/// An UART Peripheral based on an underlying UART device.
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/// An UART Peripheral based on an underlying UART device.
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pub struct UartPeripheral<S: State, D: UartDevice, P: ValidUartPinout<D>> {
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pub struct UartPeripheral<S: State, D: UartDevice, P: ValidUartPinout<D>> {
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@ -139,47 +140,13 @@ impl<D: UartDevice, P: ValidUartPinout<D>> UartPeripheral<Enabled, D, P> {
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self.transition(Disabled)
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self.transition(Disabled)
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}
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}
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pub(crate) fn transmit_flushed(&self) -> nb::Result<(), Infallible> {
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if self.device.uartfr.read().txfe().bit_is_set() {
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Ok(())
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} else {
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Err(WouldBlock)
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}
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}
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fn uart_is_writable(&self) -> bool {
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self.device.uartfr.read().txff().bit_is_clear()
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}
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fn uart_is_readable(&self) -> bool {
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self.device.uartfr.read().rxfe().bit_is_clear()
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}
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/// Writes bytes to the UART.
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/// Writes bytes to the UART.
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/// This function writes as long as it can. As soon that the FIFO is full, if :
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/// This function writes as long as it can. As soon that the FIFO is full, if :
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/// - 0 bytes were written, a WouldBlock Error is returned
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/// - 0 bytes were written, a WouldBlock Error is returned
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/// - some bytes were written, it is deemed to be a success
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/// - some bytes were written, it is deemed to be a success
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/// Upon success, the remaining slice is returned.
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/// Upon success, the remaining slice is returned.
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pub fn write_raw<'d>(&self, data: &'d [u8]) -> nb::Result<&'d [u8], Infallible> {
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pub fn write_raw<'d>(&self, data: &'d [u8]) -> nb::Result<&'d [u8], Infallible> {
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let mut bytes_written = 0;
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super::writer::write_raw(&self.device, data)
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for c in data {
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if !self.uart_is_writable() {
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if bytes_written == 0 {
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return Err(WouldBlock);
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} else {
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return Ok(&data[bytes_written..]);
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}
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}
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self.device.uartdr.write(|w| unsafe {
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w.data().bits(*c);
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w
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});
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bytes_written += 1;
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}
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Ok(&data[bytes_written..])
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}
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}
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/// Reads bytes from the UART.
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/// Reads bytes from the UART.
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@ -188,83 +155,73 @@ impl<D: UartDevice, P: ValidUartPinout<D>> UartPeripheral<Enabled, D, P> {
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/// - some bytes were read, it is deemed to be a success
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/// - some bytes were read, it is deemed to be a success
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/// Upon success, it will return how many bytes were read.
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/// Upon success, it will return how many bytes were read.
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pub fn read_raw<'b>(&self, buffer: &'b mut [u8]) -> nb::Result<usize, ReadError<'b>> {
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pub fn read_raw<'b>(&self, buffer: &'b mut [u8]) -> nb::Result<usize, ReadError<'b>> {
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let mut bytes_read = 0;
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super::reader::read_raw(&self.device, buffer)
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Ok(loop {
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if !self.uart_is_readable() {
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if bytes_read == 0 {
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return Err(WouldBlock);
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} else {
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break bytes_read;
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}
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}
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if bytes_read < buffer.len() {
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let mut error: Option<ReadErrorType> = None;
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let read = self.device.uartdr.read();
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if read.oe().bit_is_set() {
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error = Some(ReadErrorType::Overrun);
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}
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if read.be().bit_is_set() {
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error = Some(ReadErrorType::Break);
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}
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if read.pe().bit_is_set() {
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error = Some(ReadErrorType::Parity);
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}
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if read.fe().bit_is_set() {
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error = Some(ReadErrorType::Framing);
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}
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if let Some(err_type) = error {
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return Err(Other(ReadError {
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err_type,
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discared: buffer,
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}));
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}
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buffer[bytes_read] = read.data().bits();
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bytes_read += 1;
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} else {
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break bytes_read;
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}
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})
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}
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}
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/// Writes bytes to the UART.
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/// Writes bytes to the UART.
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/// This function blocks until the full buffer has been sent.
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/// This function blocks until the full buffer has been sent.
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pub fn write_full_blocking(&self, data: &[u8]) {
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pub fn write_full_blocking(&self, data: &[u8]) {
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let mut temp = data;
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super::writer::write_full_blocking(&self.device, data);
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while !temp.is_empty() {
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temp = match self.write_raw(temp) {
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Ok(remaining) => remaining,
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Err(WouldBlock) => continue,
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Err(_) => unreachable!(),
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}
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}
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}
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}
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/// Reads bytes from the UART.
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/// Reads bytes from the UART.
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/// This function blocks until the full buffer has been received.
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/// This function blocks until the full buffer has been received.
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pub fn read_full_blocking(&self, buffer: &mut [u8]) -> Result<(), ReadErrorType> {
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pub fn read_full_blocking(&self, buffer: &mut [u8]) -> Result<(), ReadErrorType> {
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let mut offset = 0;
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super::reader::read_full_blocking(&self.device, buffer)
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}
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while offset != buffer.len() {
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/// Join the reader and writer halves together back into the original Uart peripheral.
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offset += match self.read_raw(&mut buffer[offset..]) {
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///
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Ok(bytes_read) => bytes_read,
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/// A reader/writer pair can be obtained by calling [`split`].
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Err(e) => match e {
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pub fn join(reader: Reader<D, P>, writer: Writer<D, P>) -> Self {
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Other(inner) => return Err(inner.err_type),
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let _ = writer;
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WouldBlock => continue,
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Self {
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},
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device: reader.device,
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_state: Enabled,
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pins: reader.pins,
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config: reader.config,
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effective_baudrate: reader.effective_baudrate,
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}
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}
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}
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}
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}
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Ok(())
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impl<P: ValidUartPinout<UART0>> UartPeripheral<Enabled, UART0, P> {
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/// Split this peripheral into a separate reader and writer.
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pub fn split(self) -> (Reader<UART0, P>, Writer<UART0, P>) {
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let reader = Reader {
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device: self.device,
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pins: self.pins,
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config: self.config,
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effective_baudrate: self.effective_baudrate,
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};
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// Safety: reader and writer will never write to the same address
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let device_copy = unsafe { &*UART0::ptr() };
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let writer = Writer {
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device: device_copy,
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device_marker: core::marker::PhantomData,
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pins: core::marker::PhantomData,
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};
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(reader, writer)
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}
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}
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impl<P: ValidUartPinout<UART1>> UartPeripheral<Enabled, UART1, P> {
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/// Split this peripheral into a separate reader and writer.
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pub fn split(self) -> (Reader<UART1, P>, Writer<UART1, P>) {
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let reader = Reader {
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device: self.device,
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pins: self.pins,
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config: self.config,
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effective_baudrate: self.effective_baudrate,
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};
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// Safety: reader and writer will never write to the same address
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let device_copy = unsafe { &*UART1::ptr() };
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let writer = Writer {
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device: device_copy,
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device_marker: core::marker::PhantomData,
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pins: core::marker::PhantomData,
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};
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(reader, writer)
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}
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}
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}
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}
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@ -390,30 +347,6 @@ impl<D: UartDevice, P: ValidUartPinout<D>> eh1::Read<u8> for UartPeripheral<Enab
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}
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}
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}
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}
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}
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}
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/// Same as core::convert::Infallible, but implementing spi::Error
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///
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/// For eh 1.0.0-alpha.6, Infallible doesn't implement spi::Error,
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/// so use a locally defined type instead.
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/// This should be removed with the next release of e-h.
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/// (https://github.com/rust-embedded/embedded-hal/pull/328)
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#[cfg(feature = "eh1_0_alpha")]
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pub enum SerialInfallible {}
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#[cfg(feature = "eh1_0_alpha")]
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impl core::fmt::Debug for SerialInfallible {
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fn fmt(&self, _f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
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match *self {}
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}
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}
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#[cfg(feature = "eh1_0_alpha")]
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impl eh1_0_alpha::serial::Error for SerialInfallible {
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fn kind(&self) -> eh1_0_alpha::serial::ErrorKind {
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match *self {}
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}
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}
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impl<D: UartDevice, P: ValidUartPinout<D>> Write<u8> for UartPeripheral<Enabled, D, P> {
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impl<D: UartDevice, P: ValidUartPinout<D>> Write<u8> for UartPeripheral<Enabled, D, P> {
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type Error = Infallible;
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type Error = Infallible;
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@ -426,7 +359,7 @@ impl<D: UartDevice, P: ValidUartPinout<D>> Write<u8> for UartPeripheral<Enabled,
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}
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}
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fn flush(&mut self) -> nb::Result<(), Self::Error> {
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fn flush(&mut self) -> nb::Result<(), Self::Error> {
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self.transmit_flushed()
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super::writer::transmit_flushed(&self.device)
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}
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}
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}
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}
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@ -443,7 +376,7 @@ impl<D: UartDevice, P: ValidUartPinout<D>> eh1::Write<u8> for UartPeripheral<Ena
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}
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}
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fn flush(&mut self) -> nb::Result<(), Self::Error> {
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fn flush(&mut self) -> nb::Result<(), Self::Error> {
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self.transmit_flushed().map_err(|e| match e {
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super::writer::transmit_flushed(&self.device).map_err(|e| match e {
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WouldBlock => WouldBlock,
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WouldBlock => WouldBlock,
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Other(v) => match v {},
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Other(v) => match v {},
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})
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})
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176
rp2040-hal/src/uart/reader.rs
Normal file
176
rp2040-hal/src/uart/reader.rs
Normal file
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@ -0,0 +1,176 @@
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use super::{UartConfig, UartDevice, ValidUartPinout};
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use embedded_hal::serial::Read;
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use embedded_time::rate::Baud;
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use nb::Error::*;
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#[cfg(feature = "eh1_0_alpha")]
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use eh1_0_alpha::serial::nb as eh1;
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/// When there's a read error.
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pub struct ReadError<'err> {
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/// The type of error
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pub err_type: ReadErrorType,
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/// Reference to the data that was read but eventually discared because of the error.
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pub discared: &'err [u8],
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}
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/// Possible types of read errors. See Chapter 4, Section 2 §8 - Table 436: "UARTDR Register"
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#[cfg_attr(feature = "eh1_0_alpha", derive(Debug))]
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pub enum ReadErrorType {
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/// Triggered when the FIFO (or shift-register) is overflowed.
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Overrun,
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/// Triggered when a break is received
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Break,
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/// Triggered when there is a parity mismatch between what's received and our settings.
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Parity,
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/// Triggered when the received character didn't have a valid stop bit.
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Framing,
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}
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#[cfg(feature = "eh1_0_alpha")]
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impl eh1_0_alpha::serial::Error for ReadErrorType {
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fn kind(&self) -> eh1_0_alpha::serial::ErrorKind {
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match self {
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ReadErrorType::Overrun => eh1_0_alpha::serial::ErrorKind::Overrun,
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ReadErrorType::Break => eh1_0_alpha::serial::ErrorKind::Other,
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ReadErrorType::Parity => eh1_0_alpha::serial::ErrorKind::Parity,
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ReadErrorType::Framing => eh1_0_alpha::serial::ErrorKind::FrameFormat,
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}
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}
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}
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pub(crate) fn is_readable<D: UartDevice>(device: &D) -> bool {
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device.uartfr.read().rxfe().bit_is_clear()
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}
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pub(crate) fn read_raw<'b, D: UartDevice>(
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device: &D,
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buffer: &'b mut [u8],
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) -> nb::Result<usize, ReadError<'b>> {
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let mut bytes_read = 0;
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Ok(loop {
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if !is_readable(device) {
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if bytes_read == 0 {
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return Err(WouldBlock);
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} else {
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break bytes_read;
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}
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}
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if bytes_read < buffer.len() {
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let mut error: Option<ReadErrorType> = None;
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let read = device.uartdr.read();
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if read.oe().bit_is_set() {
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error = Some(ReadErrorType::Overrun);
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}
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if read.be().bit_is_set() {
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error = Some(ReadErrorType::Break);
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}
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if read.pe().bit_is_set() {
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error = Some(ReadErrorType::Parity);
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}
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if read.fe().bit_is_set() {
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error = Some(ReadErrorType::Framing);
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}
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if let Some(err_type) = error {
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return Err(Other(ReadError {
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err_type,
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discared: buffer,
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}));
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}
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buffer[bytes_read] = read.data().bits();
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bytes_read += 1;
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} else {
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break bytes_read;
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}
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})
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}
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pub(crate) fn read_full_blocking<D: UartDevice>(
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device: &D,
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buffer: &mut [u8],
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) -> Result<(), ReadErrorType> {
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let mut offset = 0;
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|
while offset != buffer.len() {
|
||||||
|
offset += match read_raw(device, &mut buffer[offset..]) {
|
||||||
|
Ok(bytes_read) => bytes_read,
|
||||||
|
Err(e) => match e {
|
||||||
|
Other(inner) => return Err(inner.err_type),
|
||||||
|
WouldBlock => continue,
|
||||||
|
},
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Half of an [`UartPeripheral`] that is only capable of reading. Obtained by calling [`UartPeripheral::split()`]
|
||||||
|
pub struct Reader<D: UartDevice, P: ValidUartPinout<D>> {
|
||||||
|
pub(super) device: D,
|
||||||
|
pub(super) pins: P,
|
||||||
|
pub(super) config: UartConfig,
|
||||||
|
pub(super) effective_baudrate: Baud,
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<D: UartDevice, P: ValidUartPinout<D>> Reader<D, P> {
|
||||||
|
/// Reads bytes from the UART.
|
||||||
|
/// This function reads as long as it can. As soon that the FIFO is empty, if :
|
||||||
|
/// - 0 bytes were read, a WouldBlock Error is returned
|
||||||
|
/// - some bytes were read, it is deemed to be a success
|
||||||
|
/// Upon success, it will return how many bytes were read.
|
||||||
|
pub fn read_raw<'b>(&self, buffer: &'b mut [u8]) -> nb::Result<usize, ReadError<'b>> {
|
||||||
|
read_raw(&self.device, buffer)
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Reads bytes from the UART.
|
||||||
|
/// This function blocks until the full buffer has been received.
|
||||||
|
pub fn read_full_blocking(&self, buffer: &mut [u8]) -> Result<(), ReadErrorType> {
|
||||||
|
read_full_blocking(&self.device, buffer)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<D: UartDevice, P: ValidUartPinout<D>> Read<u8> for Reader<D, P> {
|
||||||
|
type Error = ReadErrorType;
|
||||||
|
|
||||||
|
fn read(&mut self) -> nb::Result<u8, Self::Error> {
|
||||||
|
let byte: &mut [u8] = &mut [0; 1];
|
||||||
|
|
||||||
|
match self.read_raw(byte) {
|
||||||
|
Ok(_) => Ok(byte[0]),
|
||||||
|
Err(e) => match e {
|
||||||
|
Other(inner) => Err(Other(inner.err_type)),
|
||||||
|
WouldBlock => Err(WouldBlock),
|
||||||
|
},
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(feature = "eh1_0_alpha")]
|
||||||
|
impl<D: UartDevice, P: ValidUartPinout<D>> eh1::Read<u8> for Reader<D, P> {
|
||||||
|
type Error = ReadErrorType;
|
||||||
|
|
||||||
|
fn read(&mut self) -> nb::Result<u8, Self::Error> {
|
||||||
|
let byte: &mut [u8] = &mut [0; 1];
|
||||||
|
|
||||||
|
match self.read_raw(byte) {
|
||||||
|
Ok(_) => Ok(byte[0]),
|
||||||
|
Err(e) => match e {
|
||||||
|
Other(inner) => Err(Other(inner.err_type)),
|
||||||
|
WouldBlock => Err(WouldBlock),
|
||||||
|
},
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
|
@ -9,49 +9,11 @@ pub enum Error {
|
||||||
/// Bad argument : when things overflow, ...
|
/// Bad argument : when things overflow, ...
|
||||||
BadArgument,
|
BadArgument,
|
||||||
}
|
}
|
||||||
|
|
||||||
/// When there's a read error.
|
|
||||||
pub struct ReadError<'err> {
|
|
||||||
/// The type of error
|
|
||||||
pub err_type: ReadErrorType,
|
|
||||||
|
|
||||||
/// Reference to the data that was read but eventually discared because of the error.
|
|
||||||
pub discared: &'err [u8],
|
|
||||||
}
|
|
||||||
|
|
||||||
/// Possible types of read errors. See Chapter 4, Section 2 §8 - Table 436: "UARTDR Register"
|
|
||||||
#[cfg_attr(feature = "eh1_0_alpha", derive(Debug))]
|
|
||||||
pub enum ReadErrorType {
|
|
||||||
/// Triggered when the FIFO (or shift-register) is overflowed.
|
|
||||||
Overrun,
|
|
||||||
|
|
||||||
/// Triggered when a break is received
|
|
||||||
Break,
|
|
||||||
|
|
||||||
/// Triggered when there is a parity mismatch between what's received and our settings.
|
|
||||||
Parity,
|
|
||||||
|
|
||||||
/// Triggered when the received character didn't have a valid stop bit.
|
|
||||||
Framing,
|
|
||||||
}
|
|
||||||
|
|
||||||
#[cfg(feature = "eh1_0_alpha")]
|
|
||||||
impl eh1_0_alpha::serial::Error for ReadErrorType {
|
|
||||||
fn kind(&self) -> eh1_0_alpha::serial::ErrorKind {
|
|
||||||
match self {
|
|
||||||
ReadErrorType::Overrun => eh1_0_alpha::serial::ErrorKind::Overrun,
|
|
||||||
ReadErrorType::Break => eh1_0_alpha::serial::ErrorKind::Other,
|
|
||||||
ReadErrorType::Parity => eh1_0_alpha::serial::ErrorKind::Parity,
|
|
||||||
ReadErrorType::Framing => eh1_0_alpha::serial::ErrorKind::FrameFormat,
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/// State of the UART Peripheral.
|
/// State of the UART Peripheral.
|
||||||
pub trait State {}
|
pub trait State {}
|
||||||
|
|
||||||
/// Trait to handle both underlying devices (UART0 & UART1)
|
/// Trait to handle both underlying devices (UART0 & UART1)
|
||||||
pub trait UartDevice: Deref<Target = RegisterBlock> + SubsystemReset {}
|
pub trait UartDevice: Deref<Target = RegisterBlock> + SubsystemReset + 'static {}
|
||||||
|
|
||||||
impl UartDevice for UART0 {}
|
impl UartDevice for UART0 {}
|
||||||
impl UartDevice for UART1 {}
|
impl UartDevice for UART1 {}
|
||||||
|
@ -111,3 +73,26 @@ pub struct UartConfig {
|
||||||
/// The parity that this uart should have
|
/// The parity that this uart should have
|
||||||
pub parity: Option<Parity>,
|
pub parity: Option<Parity>,
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// Same as core::convert::Infallible, but implementing spi::Error
|
||||||
|
///
|
||||||
|
/// For eh 1.0.0-alpha.6, Infallible doesn't implement spi::Error,
|
||||||
|
/// so use a locally defined type instead.
|
||||||
|
/// This should be removed with the next release of e-h.
|
||||||
|
/// (https://github.com/rust-embedded/embedded-hal/pull/328)
|
||||||
|
#[cfg(feature = "eh1_0_alpha")]
|
||||||
|
pub enum SerialInfallible {}
|
||||||
|
|
||||||
|
#[cfg(feature = "eh1_0_alpha")]
|
||||||
|
impl core::fmt::Debug for SerialInfallible {
|
||||||
|
fn fmt(&self, _f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
|
||||||
|
match *self {}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(feature = "eh1_0_alpha")]
|
||||||
|
impl eh1_0_alpha::serial::Error for SerialInfallible {
|
||||||
|
fn kind(&self) -> eh1_0_alpha::serial::ErrorKind {
|
||||||
|
match *self {}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
126
rp2040-hal/src/uart/writer.rs
Normal file
126
rp2040-hal/src/uart/writer.rs
Normal file
|
@ -0,0 +1,126 @@
|
||||||
|
use super::{UartDevice, ValidUartPinout};
|
||||||
|
use core::fmt;
|
||||||
|
use core::{convert::Infallible, marker::PhantomData};
|
||||||
|
use embedded_hal::serial::Write;
|
||||||
|
use nb::Error::*;
|
||||||
|
use rp2040_pac::uart0::RegisterBlock;
|
||||||
|
|
||||||
|
#[cfg(feature = "eh1_0_alpha")]
|
||||||
|
use eh1_0_alpha::serial::nb as eh1;
|
||||||
|
|
||||||
|
pub(crate) fn transmit_flushed(rb: &RegisterBlock) -> nb::Result<(), Infallible> {
|
||||||
|
if rb.uartfr.read().txfe().bit_is_set() {
|
||||||
|
Ok(())
|
||||||
|
} else {
|
||||||
|
Err(WouldBlock)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn uart_is_writable(rb: &RegisterBlock) -> bool {
|
||||||
|
rb.uartfr.read().txff().bit_is_clear()
|
||||||
|
}
|
||||||
|
|
||||||
|
pub(crate) fn write_raw<'d>(
|
||||||
|
rb: &RegisterBlock,
|
||||||
|
data: &'d [u8],
|
||||||
|
) -> nb::Result<&'d [u8], Infallible> {
|
||||||
|
let mut bytes_written = 0;
|
||||||
|
|
||||||
|
for c in data {
|
||||||
|
if !uart_is_writable(rb) {
|
||||||
|
if bytes_written == 0 {
|
||||||
|
return Err(WouldBlock);
|
||||||
|
} else {
|
||||||
|
return Ok(&data[bytes_written..]);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
rb.uartdr.write(|w| unsafe {
|
||||||
|
w.data().bits(*c);
|
||||||
|
w
|
||||||
|
});
|
||||||
|
|
||||||
|
bytes_written += 1;
|
||||||
|
}
|
||||||
|
Ok(&data[bytes_written..])
|
||||||
|
}
|
||||||
|
|
||||||
|
pub(crate) fn write_full_blocking(rb: &RegisterBlock, data: &[u8]) {
|
||||||
|
let mut temp = data;
|
||||||
|
|
||||||
|
while !temp.is_empty() {
|
||||||
|
temp = match write_raw(rb, temp) {
|
||||||
|
Ok(remaining) => remaining,
|
||||||
|
Err(WouldBlock) => continue,
|
||||||
|
Err(_) => unreachable!(),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Half of an [`UartPeripheral`] that is only capable of writing. Obtained by calling [`UartPeripheral::split()`]
|
||||||
|
pub struct Writer<D: UartDevice, P: ValidUartPinout<D>> {
|
||||||
|
pub(super) device: &'static RegisterBlock,
|
||||||
|
pub(super) device_marker: PhantomData<D>,
|
||||||
|
pub(super) pins: PhantomData<P>,
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<D: UartDevice, P: ValidUartPinout<D>> Writer<D, P> {
|
||||||
|
/// Writes bytes to the UART.
|
||||||
|
/// This function writes as long as it can. As soon that the FIFO is full, if :
|
||||||
|
/// - 0 bytes were written, a WouldBlock Error is returned
|
||||||
|
/// - some bytes were written, it is deemed to be a success
|
||||||
|
/// Upon success, the remaining slice is returned.
|
||||||
|
pub fn write_raw<'d>(&self, data: &'d [u8]) -> nb::Result<&'d [u8], Infallible> {
|
||||||
|
write_raw(self.device, data)
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Writes bytes to the UART.
|
||||||
|
/// This function blocks until the full buffer has been sent.
|
||||||
|
pub fn write_full_blocking(&self, data: &[u8]) {
|
||||||
|
super::writer::write_full_blocking(self.device, data);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<D: UartDevice, P: ValidUartPinout<D>> Write<u8> for Writer<D, P> {
|
||||||
|
type Error = Infallible;
|
||||||
|
|
||||||
|
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
|
||||||
|
if self.write_raw(&[word]).is_err() {
|
||||||
|
Err(WouldBlock)
|
||||||
|
} else {
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
||||||
|
super::writer::transmit_flushed(self.device)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(feature = "eh1_0_alpha")]
|
||||||
|
impl<D: UartDevice, P: ValidUartPinout<D>> eh1::Write<u8> for Writer<D, P> {
|
||||||
|
type Error = super::utils::SerialInfallible;
|
||||||
|
|
||||||
|
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
|
||||||
|
if self.write_raw(&[word]).is_err() {
|
||||||
|
Err(WouldBlock)
|
||||||
|
} else {
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
||||||
|
transmit_flushed(&self.device).map_err(|e| match e {
|
||||||
|
WouldBlock => WouldBlock,
|
||||||
|
Other(v) => match v {},
|
||||||
|
})
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<D: UartDevice, P: ValidUartPinout<D>> fmt::Write for Writer<D, P> {
|
||||||
|
fn write_str(&mut self, s: &str) -> fmt::Result {
|
||||||
|
s.bytes()
|
||||||
|
.try_for_each(|c| nb::block!(self.write(c)))
|
||||||
|
.map_err(|_| fmt::Error)
|
||||||
|
}
|
||||||
|
}
|
Loading…
Reference in a new issue