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Use new spinlock API provide by PAC 0.3.0
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parent
5771f872f2
commit
c8c366c23d
3 changed files with 38 additions and 38 deletions
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@ -16,7 +16,7 @@ eh1_0_alpha = { version = "=1.0.0-alpha.6", package="embedded-hal", optional=tru
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embedded-time = "0.12.0"
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embedded-time = "0.12.0"
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itertools = { version = "0.10.1", default-features = false }
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itertools = { version = "0.10.1", default-features = false }
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nb = "1.0"
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nb = "1.0"
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rp2040-pac = "0.2.0"
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rp2040-pac = "0.3.0"
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paste = "1.0"
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paste = "1.0"
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pio = "0.1.0"
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pio = "0.1.0"
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usb-device = "0.2.8"
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usb-device = "0.2.8"
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@ -41,7 +41,7 @@ unsafe impl critical_section::Impl for RpSpinlockCs {
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// Ensure the compiler doesn't re-order accesses and violate safety here
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// Ensure the compiler doesn't re-order accesses and violate safety here
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core::sync::atomic::compiler_fence(Ordering::SeqCst);
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core::sync::atomic::compiler_fence(Ordering::SeqCst);
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// Read the spinlock reserved for `critical_section`
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// Read the spinlock reserved for `critical_section`
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if (*pac::SIO::ptr()).spinlock31.read().bits() != 0 {
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if (*pac::SIO::ptr()).spinlock[31].read().bits() != 0 {
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// We just acquired the lock.
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// We just acquired the lock.
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// Store which core we are so we can tell if we're called recursively
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// Store which core we are so we can tell if we're called recursively
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LOCK_OWNER.store(core, Ordering::Relaxed);
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LOCK_OWNER.store(core, Ordering::Relaxed);
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@ -67,7 +67,7 @@ unsafe impl critical_section::Impl for RpSpinlockCs {
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// Ensure the compiler doesn't re-order accesses and violate safety here
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// Ensure the compiler doesn't re-order accesses and violate safety here
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core::sync::atomic::compiler_fence(Ordering::SeqCst);
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core::sync::atomic::compiler_fence(Ordering::SeqCst);
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// Release the spinlock to allow others to enter critical_section again
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// Release the spinlock to allow others to enter critical_section again
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(*pac::SIO::ptr()).spinlock31.write_with_zero(|w| w.bits(1));
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(*pac::SIO::ptr()).spinlock[31].write_with_zero(|w| w.bits(1));
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// Re-enable interrupts if they were enabled when we first called acquire()
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// Re-enable interrupts if they were enabled when we first called acquire()
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// We only do this on the outermost `critical_section` to ensure interrupts stay disabled
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// We only do this on the outermost `critical_section` to ensure interrupts stay disabled
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// for the whole time that we have the lock
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// for the whole time that we have the lock
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@ -230,7 +230,7 @@ pub trait Spinlock: typelevel::Sealed + Sized {
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}
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}
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}
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}
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macro_rules! impl_spinlock {
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macro_rules! impl_spinlock {
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($($spinlock_name:ident => $register:ident,)*) => {
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($($spinlock_name:ident => $register:literal,)*) => {
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$(
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$(
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/// Hardware based spinlock.
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/// Hardware based spinlock.
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///
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///
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@ -258,7 +258,7 @@ macro_rules! impl_spinlock {
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fn try_claim() -> Option<$spinlock_name> {
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fn try_claim() -> Option<$spinlock_name> {
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// Safety: We're only reading from this register
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// Safety: We're only reading from this register
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let sio = unsafe { &*pac::SIO::ptr() };
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let sio = unsafe { &*pac::SIO::ptr() };
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let lock = sio.$register.read().bits();
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let lock = sio.spinlock[$register].read().bits();
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if lock > 0 {
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if lock > 0 {
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Some(Self(core::marker::PhantomData))
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Some(Self(core::marker::PhantomData))
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} else {
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} else {
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@ -276,7 +276,7 @@ macro_rules! impl_spinlock {
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let sio = unsafe { &*pac::SIO::ptr() };
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let sio = unsafe { &*pac::SIO::ptr() };
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// Write (any value): release the lock
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// Write (any value): release the lock
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sio.$register.write(|b| unsafe { b.bits(1) });
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sio.spinlock[$register].write(|b| unsafe { b.bits(1) });
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}
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}
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}
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}
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)*
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)*
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@ -284,38 +284,38 @@ macro_rules! impl_spinlock {
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}
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}
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impl_spinlock! {
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impl_spinlock! {
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Spinlock0 => spinlock0,
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Spinlock0 => 0,
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Spinlock1 => spinlock1,
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Spinlock1 => 1,
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Spinlock2 => spinlock2,
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Spinlock2 => 2,
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Spinlock3 => spinlock3,
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Spinlock3 => 3,
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Spinlock4 => spinlock4,
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Spinlock4 => 4,
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Spinlock5 => spinlock5,
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Spinlock5 => 5,
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Spinlock6 => spinlock6,
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Spinlock6 => 6,
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Spinlock7 => spinlock7,
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Spinlock7 => 7,
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Spinlock8 => spinlock8,
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Spinlock8 => 8,
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Spinlock9 => spinlock9,
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Spinlock9 => 9,
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Spinlock10 => spinlock10,
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Spinlock10 => 10,
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Spinlock11 => spinlock11,
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Spinlock11 => 11,
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Spinlock12 => spinlock12,
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Spinlock12 => 12,
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Spinlock13 => spinlock13,
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Spinlock13 => 13,
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Spinlock14 => spinlock14,
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Spinlock14 => 14,
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Spinlock15 => spinlock15,
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Spinlock15 => 15,
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Spinlock16 => spinlock16,
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Spinlock16 => 16,
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Spinlock17 => spinlock17,
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Spinlock17 => 17,
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Spinlock18 => spinlock18,
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Spinlock18 => 18,
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Spinlock19 => spinlock19,
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Spinlock19 => 19,
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Spinlock20 => spinlock20,
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Spinlock20 => 20,
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Spinlock21 => spinlock21,
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Spinlock21 => 21,
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Spinlock22 => spinlock22,
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Spinlock22 => 22,
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Spinlock23 => spinlock23,
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Spinlock23 => 23,
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Spinlock24 => spinlock24,
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Spinlock24 => 24,
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Spinlock25 => spinlock25,
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Spinlock25 => 25,
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Spinlock26 => spinlock26,
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Spinlock26 => 26,
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Spinlock27 => spinlock27,
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Spinlock27 => 27,
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Spinlock28 => spinlock28,
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Spinlock28 => 28,
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Spinlock29 => spinlock29,
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Spinlock29 => 29,
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Spinlock30 => spinlock30,
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Spinlock30 => 30,
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Spinlock31 => spinlock31,
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Spinlock31 => 31,
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}
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}
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/// Returns the current state of the spinlocks. Each index corresponds to the associated spinlock, e.g. if index `5` is set to `true`, it means that [`Spinlock5`] is currently locked.
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/// Returns the current state of the spinlocks. Each index corresponds to the associated spinlock, e.g. if index `5` is set to `true`, it means that [`Spinlock5`] is currently locked.
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