Use new spinlock API provide by PAC 0.3.0

This commit is contained in:
Jonathan 'theJPster' Pallant 2022-01-30 12:56:51 +00:00
parent 5771f872f2
commit c8c366c23d
3 changed files with 38 additions and 38 deletions

View file

@ -16,7 +16,7 @@ eh1_0_alpha = { version = "=1.0.0-alpha.6", package="embedded-hal", optional=tru
embedded-time = "0.12.0" embedded-time = "0.12.0"
itertools = { version = "0.10.1", default-features = false } itertools = { version = "0.10.1", default-features = false }
nb = "1.0" nb = "1.0"
rp2040-pac = "0.2.0" rp2040-pac = "0.3.0"
paste = "1.0" paste = "1.0"
pio = "0.1.0" pio = "0.1.0"
usb-device = "0.2.8" usb-device = "0.2.8"

View file

@ -41,7 +41,7 @@ unsafe impl critical_section::Impl for RpSpinlockCs {
// Ensure the compiler doesn't re-order accesses and violate safety here // Ensure the compiler doesn't re-order accesses and violate safety here
core::sync::atomic::compiler_fence(Ordering::SeqCst); core::sync::atomic::compiler_fence(Ordering::SeqCst);
// Read the spinlock reserved for `critical_section` // Read the spinlock reserved for `critical_section`
if (*pac::SIO::ptr()).spinlock31.read().bits() != 0 { if (*pac::SIO::ptr()).spinlock[31].read().bits() != 0 {
// We just acquired the lock. // We just acquired the lock.
// Store which core we are so we can tell if we're called recursively // Store which core we are so we can tell if we're called recursively
LOCK_OWNER.store(core, Ordering::Relaxed); LOCK_OWNER.store(core, Ordering::Relaxed);
@ -67,7 +67,7 @@ unsafe impl critical_section::Impl for RpSpinlockCs {
// Ensure the compiler doesn't re-order accesses and violate safety here // Ensure the compiler doesn't re-order accesses and violate safety here
core::sync::atomic::compiler_fence(Ordering::SeqCst); core::sync::atomic::compiler_fence(Ordering::SeqCst);
// Release the spinlock to allow others to enter critical_section again // Release the spinlock to allow others to enter critical_section again
(*pac::SIO::ptr()).spinlock31.write_with_zero(|w| w.bits(1)); (*pac::SIO::ptr()).spinlock[31].write_with_zero(|w| w.bits(1));
// Re-enable interrupts if they were enabled when we first called acquire() // Re-enable interrupts if they were enabled when we first called acquire()
// We only do this on the outermost `critical_section` to ensure interrupts stay disabled // We only do this on the outermost `critical_section` to ensure interrupts stay disabled
// for the whole time that we have the lock // for the whole time that we have the lock

View file

@ -230,7 +230,7 @@ pub trait Spinlock: typelevel::Sealed + Sized {
} }
} }
macro_rules! impl_spinlock { macro_rules! impl_spinlock {
($($spinlock_name:ident => $register:ident,)*) => { ($($spinlock_name:ident => $register:literal,)*) => {
$( $(
/// Hardware based spinlock. /// Hardware based spinlock.
/// ///
@ -258,7 +258,7 @@ macro_rules! impl_spinlock {
fn try_claim() -> Option<$spinlock_name> { fn try_claim() -> Option<$spinlock_name> {
// Safety: We're only reading from this register // Safety: We're only reading from this register
let sio = unsafe { &*pac::SIO::ptr() }; let sio = unsafe { &*pac::SIO::ptr() };
let lock = sio.$register.read().bits(); let lock = sio.spinlock[$register].read().bits();
if lock > 0 { if lock > 0 {
Some(Self(core::marker::PhantomData)) Some(Self(core::marker::PhantomData))
} else { } else {
@ -276,7 +276,7 @@ macro_rules! impl_spinlock {
let sio = unsafe { &*pac::SIO::ptr() }; let sio = unsafe { &*pac::SIO::ptr() };
// Write (any value): release the lock // Write (any value): release the lock
sio.$register.write(|b| unsafe { b.bits(1) }); sio.spinlock[$register].write(|b| unsafe { b.bits(1) });
} }
} }
)* )*
@ -284,38 +284,38 @@ macro_rules! impl_spinlock {
} }
impl_spinlock! { impl_spinlock! {
Spinlock0 => spinlock0, Spinlock0 => 0,
Spinlock1 => spinlock1, Spinlock1 => 1,
Spinlock2 => spinlock2, Spinlock2 => 2,
Spinlock3 => spinlock3, Spinlock3 => 3,
Spinlock4 => spinlock4, Spinlock4 => 4,
Spinlock5 => spinlock5, Spinlock5 => 5,
Spinlock6 => spinlock6, Spinlock6 => 6,
Spinlock7 => spinlock7, Spinlock7 => 7,
Spinlock8 => spinlock8, Spinlock8 => 8,
Spinlock9 => spinlock9, Spinlock9 => 9,
Spinlock10 => spinlock10, Spinlock10 => 10,
Spinlock11 => spinlock11, Spinlock11 => 11,
Spinlock12 => spinlock12, Spinlock12 => 12,
Spinlock13 => spinlock13, Spinlock13 => 13,
Spinlock14 => spinlock14, Spinlock14 => 14,
Spinlock15 => spinlock15, Spinlock15 => 15,
Spinlock16 => spinlock16, Spinlock16 => 16,
Spinlock17 => spinlock17, Spinlock17 => 17,
Spinlock18 => spinlock18, Spinlock18 => 18,
Spinlock19 => spinlock19, Spinlock19 => 19,
Spinlock20 => spinlock20, Spinlock20 => 20,
Spinlock21 => spinlock21, Spinlock21 => 21,
Spinlock22 => spinlock22, Spinlock22 => 22,
Spinlock23 => spinlock23, Spinlock23 => 23,
Spinlock24 => spinlock24, Spinlock24 => 24,
Spinlock25 => spinlock25, Spinlock25 => 25,
Spinlock26 => spinlock26, Spinlock26 => 26,
Spinlock27 => spinlock27, Spinlock27 => 27,
Spinlock28 => spinlock28, Spinlock28 => 28,
Spinlock29 => spinlock29, Spinlock29 => 29,
Spinlock30 => spinlock30, Spinlock30 => 30,
Spinlock31 => spinlock31, Spinlock31 => 31,
} }
/// Returns the current state of the spinlocks. Each index corresponds to the associated spinlock, e.g. if index `5` is set to `true`, it means that [`Spinlock5`] is currently locked. /// Returns the current state of the spinlocks. Each index corresponds to the associated spinlock, e.g. if index `5` is set to `true`, it means that [`Spinlock5`] is currently locked.