mirror of
https://github.com/italicsjenga/rp-hal-boards.git
synced 2025-01-23 01:36:35 +11:00
Add pause_on_debug, disable watchdog prior to enabling
This commit is contained in:
parent
fe72637972
commit
cdd9a553ad
1 changed files with 19 additions and 7 deletions
|
@ -29,7 +29,20 @@ impl Watchdog {
|
|||
|
||||
self.watchdog
|
||||
.tick
|
||||
.write(|w| unsafe { w.bits(WATCHDOG_TICK_ENABLE_BITS | cycles as u32)})
|
||||
.write(|w| unsafe { w.bits(WATCHDOG_TICK_ENABLE_BITS | cycles as u32) })
|
||||
}
|
||||
|
||||
///
|
||||
pub fn pause_on_debug(&mut self, pause: bool) {
|
||||
self.watchdog
|
||||
.ctrl
|
||||
.write(|w| {
|
||||
w
|
||||
.pause_dbg0().bit(pause)
|
||||
.pause_dbg1().bit(pause)
|
||||
.pause_jtag().bit(pause)
|
||||
|
||||
})
|
||||
}
|
||||
|
||||
fn load_counter(&self, counter: u32) {
|
||||
|
@ -38,10 +51,10 @@ impl Watchdog {
|
|||
.write(|w| unsafe { w.bits(counter)});
|
||||
}
|
||||
|
||||
fn enable(&self) {
|
||||
fn enable(&self, bit: bool) {
|
||||
self.watchdog
|
||||
.ctrl
|
||||
.write(|w| w.enable().set_bit())
|
||||
.write(|w| w.enable().bit(bit))
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -61,15 +74,14 @@ impl watchdog::WatchdogEnable for Watchdog {
|
|||
.into()
|
||||
.integer() * 2;
|
||||
|
||||
self.enable(false);
|
||||
self.load_counter(self.delay_ms);
|
||||
self.enable();
|
||||
self.enable(true);
|
||||
}
|
||||
}
|
||||
|
||||
impl watchdog::WatchdogDisable for Watchdog {
|
||||
fn disable(&mut self) {
|
||||
self.watchdog
|
||||
.ctrl
|
||||
.write(|w| w.enable().clear_bit())
|
||||
self.enable(false)
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Add table
Reference in a new issue