mirror of
https://github.com/italicsjenga/rp-hal-boards.git
synced 2024-12-23 20:51:31 +11:00
Use direct assembler calls for the divider
Convert the hardware divider to optimized assembler.
This commit is contained in:
Derek Hageman
parent
a15c109e8d
commit
f9d2610fff
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@ -1,6 +1,71 @@
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use super::Float;
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use crate::rom_data;
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use crate::sio::save_divider;
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// Make sure this stays as a separate call, because when it's inlined the
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// compiler will move the save of the registers used to contain the divider
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// state into the function prologue. That save and restore (push/pop) takes
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// longer than the actual division, so doing it in the common case where
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// they are not required wastes a lot of time.
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#[inline(never)]
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#[cold]
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fn save_divider_and_call<F, R>(f: F) -> R
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where
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F: FnOnce() -> R,
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{
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let sio = unsafe { &(*pac::SIO::ptr()) };
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// Since we can't save the signed-ness of the calculation, we have to make
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// sure that there's at least an 8 cycle delay before we read the result.
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// The Pico SDK ensures this by using a 6 cycle push and two 1 cycle reads.
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// Since we can't be sure the Rust implementation will optimize to the same,
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// just use an explicit wait.
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while !sio.div_csr.read().ready().bit() {}
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// Read the quotient last, since that's what clears the dirty flag
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let dividend = sio.div_udividend.read().bits();
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let divisor = sio.div_udivisor.read().bits();
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let remainder = sio.div_remainder.read().bits();
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let quotient = sio.div_quotient.read().bits();
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// If we get interrupted here (before a write sets the DIRTY flag) its fine, since
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// we have the full state, so the interruptor doesn't have to restore it. Once the
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// write happens and the DIRTY flag is set, the interruptor becomes responsible for
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// restoring our state.
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let result = f();
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// If we are interrupted here, then the interruptor will start an incorrect calculation
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// using a wrong divisor, but we'll restore the divisor and result ourselves correctly.
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// This sets DIRTY, so any interruptor will save the state.
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sio.div_udividend.write(|w| unsafe { w.bits(dividend) });
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// If we are interrupted here, the the interruptor may start the calculation using
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// incorrectly signed inputs, but we'll restore the result ourselves.
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// This sets DIRTY, so any interruptor will save the state.
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sio.div_udivisor.write(|w| unsafe { w.bits(divisor) });
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// If we are interrupted here, the interruptor will have restored everything but the
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// quotient may be wrongly signed. If the calculation started by the above writes is
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// still ongoing it is stopped, so it won't replace the result we're restoring.
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// DIRTY and READY set, but only DIRTY matters to make the interruptor save the state.
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sio.div_remainder.write(|w| unsafe { w.bits(remainder) });
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// State fully restored after the quotient write. This sets both DIRTY and READY, so
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// whatever we may have interrupted can read the result.
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sio.div_quotient.write(|w| unsafe { w.bits(quotient) });
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result
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}
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fn save_divider<F, R>(f: F) -> R
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where
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F: FnOnce() -> R,
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{
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let sio = unsafe { &(*pac::SIO::ptr()) };
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if !sio.div_csr.read().dirty().bit() {
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// Not dirty, so nothing is waiting for the calculation. So we can just
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// issue it directly without a save/restore.
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f()
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} else {
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save_divider_and_call(f)
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}
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}
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trait ROMDiv {
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fn rom_div(self, b: Self) -> Self;
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@ -9,14 +74,14 @@ trait ROMDiv {
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impl ROMDiv for f32 {
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fn rom_div(self, b: Self) -> Self {
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// ROM implementation uses the hardware divider, so we have to save it
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save_divider(|_sio| rom_data::float_funcs::fdiv(self, b))
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save_divider(|| rom_data::float_funcs::fdiv(self, b))
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}
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}
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impl ROMDiv for f64 {
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fn rom_div(self, b: Self) -> Self {
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// ROM implementation uses the hardware divider, so we have to save it
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save_divider(|_sio| rom_data::double_funcs::ddiv(self, b))
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save_divider(|| rom_data::double_funcs::ddiv(self, b))
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}
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}
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@ -171,107 +171,159 @@ impl SioFifo {
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}
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}
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pub(crate) fn save_divider<F, R>(f: F) -> R
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where
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F: FnOnce(&pac::sio::RegisterBlock) -> R,
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{
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let sio = unsafe { &(*pac::SIO::ptr()) };
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if !sio.div_csr.read().dirty().bit() {
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// Not dirty, so nothing is waiting for the calculation. So we can just
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// issue it directly without a save/restore.
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f(sio)
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} else {
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// Since we can't save the signed-ness of the calculation, we have to make
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// sure that there's at least an 8 cycle delay before we read the result.
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// The Pico SDK ensures this by using a 6 cycle push and two 1 cycle reads.
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// Since we can't be sure the Rust implementation will optimize to the same,
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// just use an explicit wait.
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while !sio.div_csr.read().ready().bit() {}
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// This takes advantage of how AAPCS defines a 64-bit return on 32-bit registers
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// by packing it into r0[0:31] and r1[32:63]. So all we need to do is put
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// the remainder in the high order 32 bits of a 64 bit result. We can also
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// alias the division operators to these for a similar reason r0 is the
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// result either way and r1 a scratch register, so the caller can't assume it
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// retains the argument value.
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#[cfg(target_arch = "arm")]
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core::arch::global_asm!(
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".macro hwdivider_head",
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"ldr r2, =(0xd0000000)", // SIO_BASE
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// Check the DIRTY state of the divider by shifting it into the C
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// status bit.
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"ldr r3, [r2, #0x078]", // DIV_CSR
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"lsrs r3, #2", // DIRTY = 1, so shift 2 down
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// We only need to save the state when DIRTY, otherwise we can just do the
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// division directly.
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"bcs 2f",
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"1:",
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// Do the actual division now, we're either not DIRTY, or we've saved the
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// state and branched back here so it's safe now.
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".endm",
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".macro hwdivider_tail",
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// 8 cycle delay to wait for the result. Each branch takes two cycles
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// and fits into a 2-byte Thumb instruction, so this is smaller than
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// 8 NOPs.
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"b 3f",
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"3: b 3f",
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"3: b 3f",
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"3: b 3f",
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"3:",
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// Read the quotient last, since that's what clears the dirty flag.
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"ldr r1, [r2, #0x074]", // DIV_REMAINDER
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"ldr r0, [r2, #0x070]", // DIV_QUOTIENT
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// Either return to the caller or back to the state restore.
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"bx lr",
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"2:",
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// Since we can't save the signed-ness of the calculation, we have to make
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// sure that there's at least an 8 cycle delay before we read the result.
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// The push takes 5 cycles, and we've already spent at least 7 checking
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// the DIRTY state to get here.
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"push {{r4-r6, lr}}",
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// Read the quotient last, since that's what clears the dirty flag.
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"ldr r3, [r2, #0x060]", // DIV_UDIVIDEND
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"ldr r4, [r2, #0x064]", // DIV_UDIVISOR
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"ldr r5, [r2, #0x074]", // DIV_REMAINDER
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"ldr r6, [r2, #0x070]", // DIV_QUOTIENT
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// If we get interrupted here (before a write sets the DIRTY flag) it's
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// fine, since we have the full state, so the interruptor doesn't have to
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// restore it. Once the write happens and the DIRTY flag is set, the
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// interruptor becomes responsible for restoring our state.
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"bl 1b",
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// If we are interrupted here, then the interruptor will start an incorrect
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// calculation using a wrong divisor, but we'll restore the divisor and
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// result ourselves correctly. This sets DIRTY, so any interruptor will
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// save the state.
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"str r3, [r2, #0x060]", // DIV_UDIVIDEND
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// If we are interrupted here, the the interruptor may start the
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// calculation using incorrectly signed inputs, but we'll restore the
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// result ourselves. This sets DIRTY, so any interruptor will save the
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// state.
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"str r4, [r2, #0x064]", // DIV_UDIVISOR
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// If we are interrupted here, the interruptor will have restored
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// everything but the quotient may be wrongly signed. If the calculation
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// started by the above writes is still ongoing it is stopped, so it won't
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// replace the result we're restoring. DIRTY and READY set, but only
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// DIRTY matters to make the interruptor save the state.
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"str r5, [r2, #0x074]", // DIV_REMAINDER
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// State fully restored after the quotient write. This sets both DIRTY
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// and READY, so whatever we may have interrupted can read the result.
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"str r6, [r2, #0x070]", // DIV_QUOTIENT
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"pop {{r4-r6, pc}}",
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".endm",
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);
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// Read the quotient last, since that's what clears the dirty flag
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let dividend = sio.div_udividend.read().bits();
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let divisor = sio.div_udivisor.read().bits();
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let remainder = sio.div_remainder.read().bits();
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let quotient = sio.div_quotient.read().bits();
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macro_rules! division_function {
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(
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$name:ident $($intrinsic:ident)* ( $argty:ty ) {
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$($begin:literal),+
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}
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) => {
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#[cfg(all(target_arch = "arm", not(feature = "disable-intrinsics")))]
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core::arch::global_asm!(
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// Mangle the name slightly, since this is a global symbol.
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concat!(".global _rphal_", stringify!($name)),
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concat!(".type _rphal_", stringify!($name), ", %function"),
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".align 2",
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concat!("_rphal_", stringify!($name), ":"),
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$(
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concat!(".global ", stringify!($intrinsic)),
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concat!(".type ", stringify!($intrinsic), ", %function"),
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concat!(stringify!($intrinsic), ":"),
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)*
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// If we get interrupted here (before a write sets the DIRTY flag) its fine, since
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// we have the full state, so the interruptor doesn't have to restore it. Once the
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// write happens and the DIRTY flag is set, the interruptor becomes responsible for
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// restoring our state.
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let result = f(sio);
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"hwdivider_head",
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$($begin),+ ,
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"hwdivider_tail",
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);
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// If we are interrupted here, then the interruptor will start an incorrect calculation
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// using a wrong divisor, but we'll restore the divisor and result ourselves correctly.
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// This sets DIRTY, so any interruptor will save the state.
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sio.div_udividend.write(|w| unsafe { w.bits(dividend) });
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// If we are interrupted here, the the interruptor may start the calculation using
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// incorrectly signed inputs, but we'll restore the result ourselves.
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// This sets DIRTY, so any interruptor will save the state.
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sio.div_udivisor.write(|w| unsafe { w.bits(divisor) });
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// If we are interrupted here, the interruptor will have restored everything but the
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// quotient may be wrongly signed. If the calculation started by the above writes is
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// still ongoing it is stopped, so it won't replace the result we're restoring.
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// DIRTY and READY set, but only DIRTY matters to make the interruptor save the state.
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sio.div_remainder.write(|w| unsafe { w.bits(remainder) });
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// State fully restored after the quotient write. This sets both DIRTY and READY, so
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// whatever we may have interrupted can read the result.
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sio.div_quotient.write(|w| unsafe { w.bits(quotient) });
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#[cfg(all(target_arch = "arm", feature = "disable-intrinsics"))]
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core::arch::global_asm!(
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// Mangle the name slightly, since this is a global symbol.
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concat!(".global _rphal_", stringify!($name)),
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concat!(".type _rphal_", stringify!($name), ", %function"),
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".align 2",
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concat!("_rphal_", stringify!($name), ":"),
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result
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"hwdivider_head",
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$($begin),+ ,
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"hwdivider_tail",
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);
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#[cfg(target_arch = "arm")]
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extern "aapcs" {
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// Connect a local name to global symbol above through FFI.
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#[link_name = concat!("_rphal_", stringify!($name)) ]
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fn $name(n: $argty, d: $argty) -> u64;
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}
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#[cfg(not(target_arch = "arm"))]
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#[allow(unused_variables)]
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unsafe fn $name(n: $argty, d: $argty) -> u64 { 0 }
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};
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}
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division_function! {
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unsigned_divmod __aeabi_uidivmod __aeabi_uidiv ( u32 ) {
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"str r0, [r2, #0x060]", // DIV_UDIVIDEND
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"str r1, [r2, #0x064]" // DIV_UDIVISOR
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}
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}
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// Don't use cortex_m::asm::delay(8) because that ends up delaying 15 cycles
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// on Cortex-M0. Each iteration of the inner loop is 3 cycles and it adds
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// one extra iteration.
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#[inline(always)]
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fn divider_delay() {
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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division_function! {
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signed_divmod __aeabi_idivmod __aeabi_idiv ( i32 ) {
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"str r0, [r2, #0x068]", // DIV_SDIVIDEND
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"str r1, [r2, #0x06c]" // DIV_SDIVISOR
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}
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}
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fn divider_unsigned(dividend: u32, divisor: u32) -> DivResult<u32> {
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save_divider(|sio| {
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sio.div_udividend.write(|w| unsafe { w.bits(dividend) });
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sio.div_udivisor.write(|w| unsafe { w.bits(divisor) });
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divider_delay();
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// Note: quotient must be read last
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let remainder = sio.div_remainder.read().bits();
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let quotient = sio.div_quotient.read().bits();
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DivResult {
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remainder,
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quotient,
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}
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})
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fn divider_unsigned(n: u32, d: u32) -> DivResult<u32> {
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let packed = unsafe { unsigned_divmod(n, d) };
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DivResult {
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quotient: packed as u32,
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remainder: (packed >> 32) as u32,
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}
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}
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fn divider_signed(dividend: i32, divisor: i32) -> DivResult<i32> {
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save_divider(|sio| {
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sio.div_sdividend
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.write(|w| unsafe { w.bits(dividend as u32) });
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sio.div_sdivisor
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.write(|w| unsafe { w.bits(divisor as u32) });
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divider_delay();
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// Note: quotient must be read last
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let remainder = sio.div_remainder.read().bits() as i32;
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let quotient = sio.div_quotient.read().bits() as i32;
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DivResult {
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remainder,
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quotient,
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}
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})
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fn divider_signed(n: i32, d: i32) -> DivResult<i32> {
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let packed = unsafe { signed_divmod(n, d) };
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// Double casts to avoid sign extension
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DivResult {
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quotient: packed as u32 as i32,
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remainder: (packed >> 32) as u32 as i32,
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}
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}
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impl HwDivider {
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@ -287,7 +339,6 @@ impl HwDivider {
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}
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intrinsics! {
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#[aeabi = __aeabi_uidiv]
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extern "C" fn __udivsi3(n: u32, d: u32) -> u32 {
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divider_unsigned(n, d).quotient
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}
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@ -304,7 +355,6 @@ intrinsics! {
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quo_rem.quotient
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}
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#[aeabi = __aeabi_idiv]
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extern "C" fn __divsi3(n: i32, d: i32) -> i32 {
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divider_signed(n, d).quotient
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}
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