Hmvp
f310d92b64
Refactor clocks ( #54 )
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* Remove unneeded lines
* Reduce macro boilerplate
* Refactor clocks
2021-07-08 20:58:48 +10:00
Hmvp
614180eda3
Clock init ( #49 )
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Add preliminary clock init function
2021-07-07 01:30:44 +10:00
Andrea Nall
8d0fde20c6
Add SubsystemReset
trait to handle subsystem resets
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dd a `SubsystemReset` trait which adds a `reset_bring_up` function to the
relevant PAC types to handle bringing subsystems out of reset.
Also, correct that the PLL and UART modules did not bring the relevant
subsystems out of reset and refactor the GPIO module to use the
SubsystemReset trait.
2021-05-16 13:12:26 -05:00
Nic0w
a663b1f552
Clippy, second pass for errors in CI.
2021-05-09 09:42:31 +02:00
Nic0w
64dee52dd5
Satisfies clippy
2021-05-05 07:55:51 +02:00
Nic0w
5620bdbd07
Move checks in new() so initialize() cannot fail.
2021-04-29 21:06:11 +02:00
Nic0w
eb4ebc782a
Cargo fmt pass.
2021-04-29 20:35:47 +02:00
Nic0w
e91e124484
Merge branch 'pll' of github.com:Nic0w/rp-hal into pll
2021-04-29 20:21:02 +02:00
Nic0w
eb376cf47b
Using modify() to clear specific bits instead of a blanket 0 on all bits.
2021-04-29 20:16:52 +02:00
Nic0w
5726bef879
Fix typo on post_div check
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Co-authored-by: tdittr <tdittr@users.noreply.github.com>
2021-04-29 20:16:52 +02:00
Nic0w
20c35d5e14
Fix type conversion issue
2021-04-29 20:16:52 +02:00
Nic0w
649998189f
Move PLL parameters into a struct to help testability and reconfiguration of the PLL.
2021-04-29 20:16:52 +02:00
Nic0w
9be7c41400
Working implementation of a PLL HAL.
2021-04-29 20:16:52 +02:00
Nic0w
2462c430b9
Fix typo on post_div check
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Co-authored-by: tdittr <tdittr@users.noreply.github.com>
2021-04-25 19:48:09 +02:00
Nic0w
c3bc1bbaf8
Fix type conversion issue
2021-04-25 19:45:45 +02:00
Nic0w
6157ce552f
Move PLL parameters into a struct to help testability and reconfiguration of the PLL.
2021-04-25 17:51:03 +02:00
Nic0w
ff418b0453
Working implementation of a PLL HAL.
2021-04-25 10:12:38 +02:00