mirror of
https://github.com/italicsjenga/rp-hal-boards.git
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267 lines
8.1 KiB
Rust
267 lines
8.1 KiB
Rust
//! Inter-Integrated Circuit (I2C) bus
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//!
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//! See [Chapter 4 Section 3](https://datasheets.raspberrypi.org/rp2040/rp2040_datasheet.pdf) for more details
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//!
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//! ## Usage
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//! ```no_run
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//! use embedded_time::rate::Extensions;
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//! use rp2040_hal::{i2c::I2C, gpio::Pins, pac, Sio};
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//! let mut peripherals = pac::Peripherals::take().unwrap();
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//! let sio = Sio::new(peripherals.SIO);
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//! let pins = Pins::new(peripherals.IO_BANK0, peripherals.PADS_BANK0, sio.gpio_bank0, &mut peripherals.RESETS);
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//!
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//! let mut i2c = I2C::i2c1(
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//! peripherals.I2C1,
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//! pins.gpio18.into_mode(), // sda
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//! pins.gpio19.into_mode(), // scl
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//! 400.kHz(),
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//! &mut peripherals.RESETS,
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//! 125_000_000.Hz(),
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//! );
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//!
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//! // Scan for devices on the bus by attempting to read from them
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//! use embedded_hal::prelude::_embedded_hal_blocking_i2c_Read;
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//! for i in 0..=127 {
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//! let mut readbuf: [u8; 1] = [0; 1];
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//! let result = i2c.read(i, &mut readbuf);
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//! if let Ok(d) = result {
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//! // Do whatever work you want to do with found devices
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//! // writeln!(uart, "Device found at address{:?}", i).unwrap();
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//! }
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//! }
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//!
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//! // Write some data to a device at 0x2c
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//! use embedded_hal::prelude::_embedded_hal_blocking_i2c_Write;
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//! i2c.write(0x2c, &[1, 2, 3]).unwrap();
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//!
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//! // Write and then read from a device at 0x3a
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//! use embedded_hal::prelude::_embedded_hal_blocking_i2c_WriteRead;
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//! let mut readbuf: [u8; 1] = [0; 1];
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//! i2c.write_read(0x2c, &[1, 2, 3], &mut readbuf).unwrap();
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//! ```
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//!
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//! See [examples/i2c.rs](https://github.com/rp-rs/rp-hal/tree/main/rp2040-hal/examples/i2c.rs)
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//! for a complete example
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use core::{marker::PhantomData, ops::Deref};
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use crate::{
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gpio::pin::bank0::{
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BankPinId, Gpio0, Gpio1, Gpio10, Gpio11, Gpio12, Gpio13, Gpio14, Gpio15, Gpio16, Gpio17,
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Gpio18, Gpio19, Gpio2, Gpio20, Gpio21, Gpio26, Gpio27, Gpio3, Gpio4, Gpio5, Gpio6, Gpio7,
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Gpio8, Gpio9,
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},
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gpio::pin::{FunctionI2C, Pin, PinId},
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resets::SubsystemReset,
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typelevel::Sealed,
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};
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use embedded_time::rate::Hertz;
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use pac::{i2c0::RegisterBlock as I2CBlock, I2C0, I2C1, RESETS};
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/// Controller implementaion
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pub mod controller;
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/// Peripheral implementation
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pub mod peripheral;
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/// I2C error
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#[non_exhaustive]
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#[derive(Debug)]
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pub enum Error {
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/// I2C abort with error
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Abort(u32),
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/// User passed in a read buffer that was 0 length
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InvalidReadBufferLength,
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/// User passed in a write buffer that was 0 length
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InvalidWriteBufferLength,
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/// Target i2c address is out of range
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AddressOutOfRange(u16),
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/// Target i2c address is reserved
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AddressReserved(u16),
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}
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#[cfg(feature = "eh1_0_alpha")]
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impl eh1_0_alpha::i2c::Error for Error {
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fn kind(&self) -> eh1_0_alpha::i2c::ErrorKind {
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match &self {
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Error::Abort(v) if v & 1<<12 != 0 // ARB_LOST
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=> eh1_0_alpha::i2c::ErrorKind::ArbitrationLoss,
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Error::Abort(v) if v & 1<<7 != 0 // ABRT_SBYTE_ACKDET
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=> eh1_0_alpha::i2c::ErrorKind::Bus,
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Error::Abort(v) if v & 1<<6 != 0 // ABRT_HS_ACKDET
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=> eh1_0_alpha::i2c::ErrorKind::Bus,
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Error::Abort(v) if v & 1<<4 != 0 // ABRT_GCALL_NOACK
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=> eh1_0_alpha::i2c::ErrorKind::NoAcknowledge(eh1_0_alpha::i2c::NoAcknowledgeSource::Address),
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Error::Abort(v) if v & 1<<3 != 0 // ABRT_TXDATA_NOACK
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=> eh1_0_alpha::i2c::ErrorKind::NoAcknowledge(eh1_0_alpha::i2c::NoAcknowledgeSource::Data),
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Error::Abort(v) if v & 1<<2 != 0 // ABRT_10ADDR2_NOACK
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=> eh1_0_alpha::i2c::ErrorKind::NoAcknowledge(eh1_0_alpha::i2c::NoAcknowledgeSource::Address),
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Error::Abort(v) if v & 1<<1 != 0 // ABRT_10ADDR1_NOACK
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=> eh1_0_alpha::i2c::ErrorKind::NoAcknowledge(eh1_0_alpha::i2c::NoAcknowledgeSource::Address),
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Error::Abort(v) if v & 1<<0 != 0 // ABRT_7B_ADDR_NOACK
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=> eh1_0_alpha::i2c::ErrorKind::NoAcknowledge(eh1_0_alpha::i2c::NoAcknowledgeSource::Address),
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_ => eh1_0_alpha::i2c::ErrorKind::Other,
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}
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}
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}
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/// SCL pin
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pub trait SclPin<I2C>: Sealed {}
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/// SDA pin
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pub trait SdaPin<I2C>: Sealed {}
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impl SdaPin<I2C0> for Gpio0 {}
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impl SclPin<I2C0> for Gpio1 {}
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impl SdaPin<I2C1> for Gpio2 {}
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impl SclPin<I2C1> for Gpio3 {}
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impl SdaPin<I2C0> for Gpio4 {}
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impl SclPin<I2C0> for Gpio5 {}
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impl SdaPin<I2C1> for Gpio6 {}
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impl SclPin<I2C1> for Gpio7 {}
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impl SdaPin<I2C0> for Gpio8 {}
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impl SclPin<I2C0> for Gpio9 {}
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impl SdaPin<I2C1> for Gpio10 {}
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impl SclPin<I2C1> for Gpio11 {}
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impl SdaPin<I2C0> for Gpio12 {}
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impl SclPin<I2C0> for Gpio13 {}
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impl SdaPin<I2C1> for Gpio14 {}
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impl SclPin<I2C1> for Gpio15 {}
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impl SdaPin<I2C0> for Gpio16 {}
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impl SclPin<I2C0> for Gpio17 {}
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impl SdaPin<I2C1> for Gpio18 {}
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impl SclPin<I2C1> for Gpio19 {}
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impl SdaPin<I2C0> for Gpio20 {}
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impl SclPin<I2C0> for Gpio21 {}
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impl SdaPin<I2C1> for Gpio26 {}
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impl SclPin<I2C1> for Gpio27 {}
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/// Operational mode of the I2C peripheral.
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pub trait I2CMode: Sealed {
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/// Indicates whether this mode is Controller or Peripheral.
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const IS_CONTROLLER: bool;
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}
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/// Marker for an I2C peripheral operating as a controller.
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pub enum Controller {}
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impl Sealed for Controller {}
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impl I2CMode for Controller {
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const IS_CONTROLLER: bool = true;
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}
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/// Marker for an I2C peripheral operating as a peripehral.
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pub enum Peripheral {}
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impl Sealed for Peripheral {}
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impl I2CMode for Peripheral {
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const IS_CONTROLLER: bool = false;
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}
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/// I2C peripheral
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pub struct I2C<I2C, Pins, Mode = Controller> {
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i2c: I2C,
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pins: Pins,
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mode: PhantomData<Mode>,
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}
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const TX_FIFO_SIZE: u8 = 16;
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const RX_FIFO_SIZE: u8 = 16;
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fn i2c_reserved_addr(addr: u16) -> bool {
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(addr & 0x78) == 0 || (addr & 0x78) == 0x78
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}
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impl<Block, Sda, Scl, Mode> I2C<Block, (Pin<Sda, FunctionI2C>, Pin<Scl, FunctionI2C>), Mode>
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where
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Block: SubsystemReset + Deref<Target = I2CBlock>,
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Sda: PinId + BankPinId,
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Scl: PinId + BankPinId,
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Mode: I2CMode,
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{
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/// Releases the I2C peripheral and associated pins
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#[allow(clippy::type_complexity)]
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pub fn free(
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self,
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resets: &mut RESETS,
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) -> (Block, (Pin<Sda, FunctionI2C>, Pin<Scl, FunctionI2C>)) {
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self.i2c.reset_bring_down(resets);
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(self.i2c, self.pins)
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}
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}
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impl<Block: Deref<Target = I2CBlock>, PINS, Mode> I2C<Block, PINS, Mode> {
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/// Number of bytes currently in the RX FIFO
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#[inline]
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pub fn rx_fifo_used(&self) -> u8 {
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self.i2c.ic_rxflr.read().rxflr().bits()
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}
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/// Remaining capacity in the RX FIFO
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#[inline]
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pub fn rx_fifo_free(&self) -> u8 {
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RX_FIFO_SIZE - self.rx_fifo_used()
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}
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/// RX FIFO is empty
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#[inline]
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pub fn rx_fifo_empty(&self) -> bool {
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self.rx_fifo_used() == 0
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}
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/// Number of bytes currently in the TX FIFO
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#[inline]
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pub fn tx_fifo_used(&self) -> u8 {
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self.i2c.ic_txflr.read().txflr().bits()
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}
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/// Remaining capacity in the TX FIFO
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#[inline]
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pub fn tx_fifo_free(&self) -> u8 {
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TX_FIFO_SIZE - self.tx_fifo_used()
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}
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/// TX FIFO is at capacity
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#[inline]
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pub fn tx_fifo_full(&self) -> bool {
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self.tx_fifo_free() == 0
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}
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}
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macro_rules! hal {
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($($I2CX:ident: ($i2cX:ident),)+) => {
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$(
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impl<Sda: PinId + BankPinId, Scl: PinId + BankPinId>
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I2C<$I2CX, (Pin<Sda, FunctionI2C>, Pin<Scl, FunctionI2C>)> {
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/// Configures the I2C peripheral to work in master mode
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pub fn $i2cX<F, SystemF>(
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i2c: $I2CX,
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sda_pin: Pin<Sda, FunctionI2C>,
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scl_pin: Pin<Scl, FunctionI2C>,
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freq: F,
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resets: &mut RESETS,
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system_clock: SystemF) -> Self
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where
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F: Into<Hertz<u64>>,
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Sda: SdaPin<$I2CX>,
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Scl: SclPin<$I2CX>,
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SystemF: Into<Hertz<u32>>,
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{
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Self::new_controller(i2c, sda_pin, scl_pin, freq, resets, system_clock)
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}
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}
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)+
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}
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}
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hal! {
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I2C0: (i2c0),
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I2C1: (i2c1),
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}
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