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https://github.com/italicsjenga/rp-hal-boards.git
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7750781650
* embedded-hal v1.0.0-alpha.7 removed several traits * bump dependency to embedded-hal 1.0.0-alpha.7 * Mention embedded-hal alpha changes in changelog
144 lines
4.3 KiB
Rust
144 lines
4.3 KiB
Rust
//! Watchdog
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//!
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//! The watchdog is a countdown timer that can restart parts of the chip if it reaches zero. This can be used to restart the
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//! processor if software gets stuck in an infinite loop. The programmer must periodically write a value to the watchdog to
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//! stop it from reaching zero.
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//!
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//! See [Chapter 4 Section 7](https://datasheets.raspberrypi.org/rp2040/rp2040_datasheet.pdf) of the datasheet for more details
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//!
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//! ## Usage
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//! ```no_run
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//! use cortex_m::prelude::{_embedded_hal_watchdog_Watchdog, _embedded_hal_watchdog_WatchdogEnable};
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//! use embedded_time::duration::units::*;
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//! use rp2040_hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
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//! let mut pac = pac::Peripherals::take().unwrap();
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//! let mut watchdog = Watchdog::new(pac.WATCHDOG);
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//! let _clocks = init_clocks_and_plls(
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//! 12_000_000,
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//! pac.XOSC,
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//! pac.CLOCKS,
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//! pac.PLL_SYS,
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//! pac.PLL_USB,
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//! &mut pac.RESETS,
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//! &mut watchdog,
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//! ).ok().unwrap();
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//! // Set to watchdog to reset if it's not reloaded within 1.05 seconds, and start it
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//! watchdog.start(1_050_000.microseconds());
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//! // Feed the watchdog once per cycle to avoid reset
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//! for _ in 1..=10000 {
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//! cortex_m::asm::delay(100_000);
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//! watchdog.feed();
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//! }
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//! // Stop feeding, now we'll reset
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//! loop {}
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//! ```
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//! See [examples/watchdog.rs](https://github.com/rp-rs/rp-hal/tree/main/rp2040-hal/examples/watchdog.rs) for a more complete example
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use crate::pac::WATCHDOG;
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use embedded_hal::watchdog;
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use embedded_time::{duration, fixed_point::FixedPoint};
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/// Watchdog peripheral
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pub struct Watchdog {
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watchdog: WATCHDOG,
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delay_ms: u32,
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}
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impl Watchdog {
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/// Create a new [`Watchdog`]
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pub fn new(watchdog: WATCHDOG) -> Self {
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Self {
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watchdog,
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delay_ms: 0,
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}
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}
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/// Starts tick generation on clk_tick which is driven from clk_ref.
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///
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/// # Arguments
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///
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/// * `cycles` - Total number of tick cycles before the next tick is generated.
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pub fn enable_tick_generation(&mut self, cycles: u8) {
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const WATCHDOG_TICK_ENABLE_BITS: u32 = 0x200;
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self.watchdog
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.tick
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.write(|w| unsafe { w.bits(WATCHDOG_TICK_ENABLE_BITS | cycles as u32) })
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}
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/// Defines whether or not the watchdog timer should be paused when processor(s) are in debug mode
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/// or when JTAG is accessing bus fabric
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///
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/// # Arguments
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///
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/// * `pause` - If true, watchdog timer will be paused
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pub fn pause_on_debug(&mut self, pause: bool) {
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self.watchdog.ctrl.write(|w| {
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w.pause_dbg0()
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.bit(pause)
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.pause_dbg1()
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.bit(pause)
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.pause_jtag()
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.bit(pause)
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})
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}
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fn load_counter(&self, counter: u32) {
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self.watchdog.load.write(|w| unsafe { w.bits(counter) });
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}
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fn enable(&self, bit: bool) {
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self.watchdog.ctrl.write(|w| w.enable().bit(bit))
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}
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/// Configure which hardware will be reset by the watchdog
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/// the default is everything except ROSC, XOSC
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///
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/// Safety: ensure no other device is writing to psm.wdsel
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/// This is easy at the moment, since nothing else uses PSM
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unsafe fn configure_wdog_reset_triggers(&self) {
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let psm = &*pac::PSM::ptr();
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psm.wdsel.write_with_zero(|w| {
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w.bits(0x0001ffff);
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w.xosc().clear_bit();
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w.rosc().clear_bit();
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w
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});
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}
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}
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impl watchdog::Watchdog for Watchdog {
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fn feed(&mut self) {
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self.load_counter(self.delay_ms)
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}
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}
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impl watchdog::WatchdogEnable for Watchdog {
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type Time = duration::Microseconds;
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fn start<T: Into<Self::Time>>(&mut self, period: T) {
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const MAX_PERIOD: u32 = 0xFFFFFF;
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// Due to a logic error, the watchdog decrements by 2 and
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// the load value must be compensated; see RP2040-E1
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self.delay_ms = period.into().integer() * 2;
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if self.delay_ms > MAX_PERIOD {
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panic!("Period cannot exceed maximum load value of {}", MAX_PERIOD);
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}
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self.enable(false);
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unsafe {
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self.configure_wdog_reset_triggers();
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}
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self.load_counter(self.delay_ms);
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self.enable(true);
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}
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}
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impl watchdog::WatchdogDisable for Watchdog {
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fn disable(&mut self) {
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self.enable(false)
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}
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}
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