tristar: fix ram over modbus

This commit is contained in:
Alex Janka 2024-12-26 14:55:03 +11:00
parent d032d0120f
commit 272d0052ce

View file

@ -13,7 +13,6 @@ use crate::{
const DEVICE_ID: u8 = 0x01;
const RAM_DATA_SIZE: u16 = 0x005B;
const RAM_ARRAY_SIZE: usize = RAM_DATA_SIZE as usize + 1;
#[derive(Debug, Clone, Copy)]
pub struct Scaling {
@ -50,7 +49,6 @@ pub struct Tristar {
state: TristarState,
port_name: String,
modbus: tokio_modbus::client::Context,
data_in: [u16; RAM_ARRAY_SIZE],
charge_state_gauges: ChargeStateGauges,
consecutive_errors: usize,
}
@ -72,7 +70,8 @@ pub struct TristarState {
}
impl TristarState {
fn from_ram(scaling: Scaling, ram: &[u16]) -> Self {
fn from_ram(ram: &[u16]) -> Self {
let scaling = Scaling::from(ram);
Self {
battery_voltage: scaling.get_voltage(ram[TristarRamAddress::AdcVbFMed]),
target_voltage: scaling.get_voltage(ram[TristarRamAddress::VbRef]),
@ -249,7 +248,6 @@ impl Tristar {
state: Default::default(),
port_name: serial_port,
modbus,
data_in: [0; RAM_ARRAY_SIZE],
charge_state_gauges,
consecutive_errors: 0,
})
@ -260,7 +258,6 @@ impl Tristar {
.get_data()
.await
.some_or_print_with("reading tristar state")
.map(|scaling| TristarState::from_ram(scaling, &self.data_in))
{
self.consecutive_errors = 0;
BATTERY_VOLTAGE
@ -311,13 +308,12 @@ impl Tristar {
// }
}
async fn get_data(&mut self) -> Result<Scaling, TristarError> {
async fn get_data(&mut self) -> Result<TristarState, TristarError> {
let data = self
.modbus
.read_holding_registers(0x0000, RAM_DATA_SIZE + 1)
.await??;
let scaling = Scaling::from(&data);
Ok(scaling)
Ok(TristarState::from_ram(&data))
}
}