mirror of
https://github.com/italicsjenga/vello.git
synced 2025-01-10 20:51:29 +11:00
Fixup merge of staging changes
Update the backend to reflect trait changes.
This commit is contained in:
parent
dfac2148a9
commit
6ac46340e6
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@ -69,7 +69,7 @@ fn toy() -> Result<(), Error> {
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let query_pool = device.create_query_pool(2)?;
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let query_pool = device.create_query_pool(2)?;
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unsafe {
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unsafe {
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let img = device.create_image2d(256, 1)?;
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let img = device.create_image2d(256, 1)?;
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device.write_buffer(&buf, &data)?;
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device.write_buffer(&buf, data.as_ptr() as *const u8, 0, 1024)?;
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let pipeline = device.create_simple_compute_pipeline(SHADER_CODE, 1, 1)?;
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let pipeline = device.create_simple_compute_pipeline(SHADER_CODE, 1, 1)?;
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let ds = device.create_descriptor_set(&pipeline, &[&dev_buf], &[&img])?;
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let ds = device.create_descriptor_set(&pipeline, &[&dev_buf], &[&img])?;
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let mut cmd_buf = device.create_cmd_buf()?;
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let mut cmd_buf = device.create_cmd_buf()?;
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@ -86,10 +86,10 @@ fn toy() -> Result<(), Error> {
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cmd_buf.finish_timestamps(&query_pool);
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cmd_buf.finish_timestamps(&query_pool);
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cmd_buf.host_barrier();
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cmd_buf.host_barrier();
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cmd_buf.finish();
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cmd_buf.finish();
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device.run_cmd_buf(&cmd_buf, &[], &[], Some(&fence))?;
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device.run_cmd_bufs(&[&cmd_buf], &[], &[], Some(&fence))?;
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device.wait_and_reset(&[fence])?;
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device.wait_and_reset(&[fence])?;
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let mut readback: Vec<u32> = Vec::new();
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let mut readback: Vec<u32> = vec![0u32; 256];
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device.read_buffer(&buf, &mut readback)?;
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device.read_buffer(&buf, readback.as_mut_ptr() as *mut u8, 0, 1024)?;
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println!("{:?}", readback);
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println!("{:?}", readback);
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println!("{:?}", device.fetch_query_pool(&query_pool));
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println!("{:?}", device.fetch_query_pool(&query_pool));
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}
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}
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@ -244,7 +244,12 @@ impl crate::Device for Dx12Device {
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unsafe fn fetch_query_pool(&self, pool: &Self::QueryPool) -> Result<Vec<f64>, Error> {
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unsafe fn fetch_query_pool(&self, pool: &Self::QueryPool) -> Result<Vec<f64>, Error> {
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let mut buf = vec![0u64; pool.n_queries as usize];
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let mut buf = vec![0u64; pool.n_queries as usize];
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self.read_buffer(&pool.buf, &mut buf)?;
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self.read_buffer(
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&pool.buf,
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buf.as_mut_ptr() as *mut u8,
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0,
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mem::size_of_val(buf.as_slice()) as u64,
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)?;
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let ts0 = buf[0];
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let ts0 = buf[0];
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let tsp = (self.ts_freq as f64).recip();
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let tsp = (self.ts_freq as f64).recip();
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let result = buf[1..]
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let result = buf[1..]
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@ -254,16 +259,20 @@ impl crate::Device for Dx12Device {
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Ok(result)
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Ok(result)
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}
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}
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unsafe fn run_cmd_buf(
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unsafe fn run_cmd_bufs(
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&self,
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&self,
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cmd_buf: &Self::CmdBuf,
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cmd_bufs: &[&Self::CmdBuf],
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wait_semaphores: &[Self::Semaphore],
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wait_semaphores: &[Self::Semaphore],
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signal_semaphores: &[Self::Semaphore],
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signal_semaphores: &[Self::Semaphore],
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fence: Option<&Self::Fence>,
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fence: Option<&Self::Fence>,
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) -> Result<(), Error> {
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) -> Result<(), Error> {
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// TODO: handle semaphores
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// TODO: handle semaphores
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self.command_queue
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// SmallVec?
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.execute_command_lists(&[cmd_buf.0.as_raw_list()]);
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let lists = cmd_bufs
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.iter()
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.map(|c| c.0.as_raw_command_list())
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.collect::<Vec<_>>();
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self.command_queue.execute_command_lists(&lists);
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if let Some(fence) = fence {
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if let Some(fence) = fence {
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let val = fence.val.get() + 1;
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let val = fence.val.get() + 1;
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fence.val.set(val);
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fence.val.set(val);
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@ -273,28 +282,29 @@ impl crate::Device for Dx12Device {
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Ok(())
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Ok(())
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}
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}
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unsafe fn read_buffer<T: Sized>(
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unsafe fn read_buffer(
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&self,
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&self,
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buffer: &Self::Buffer,
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buffer: &Self::Buffer,
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result: &mut Vec<T>,
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dst: *mut u8,
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offset: u64,
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size: u64,
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) -> Result<(), Error> {
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) -> Result<(), Error> {
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let len = buffer.size as usize / std::mem::size_of::<T>();
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buffer
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if len > result.len() {
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.resource
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result.reserve(len - result.len());
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.read_resource(dst, offset as usize, size as usize)?;
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}
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buffer.resource.read_resource(result.as_mut_ptr(), len)?;
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result.set_len(len);
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Ok(())
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Ok(())
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}
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}
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unsafe fn write_buffer<T: Sized>(
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unsafe fn write_buffer(
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&self,
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&self,
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buffer: &Self::Buffer,
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buffer: &Self::Buffer,
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contents: &[T],
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contents: *const u8,
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offset: u64,
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size: u64,
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) -> Result<(), Error> {
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) -> Result<(), Error> {
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let len = buffer.size as usize / std::mem::size_of::<T>();
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buffer
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assert!(len >= contents.len());
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.resource
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buffer.resource.write_resource(len, contents.as_ptr())?;
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.write_resource(contents, offset as usize, size as usize)?;
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Ok(())
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Ok(())
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}
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}
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@ -120,34 +120,46 @@ impl Resource {
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self.ptr.store(ptr::null_mut(), Ordering::Relaxed);
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self.ptr.store(ptr::null_mut(), Ordering::Relaxed);
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}
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}
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pub unsafe fn write_resource<T>(&self, count: usize, data: *const T) -> Result<(), Error> {
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pub unsafe fn write_resource(
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let mut mapped_memory = ptr::null_mut();
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&self,
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data: *const u8,
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offset: usize,
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size: usize,
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) -> Result<(), Error> {
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let mut mapped_memory: *mut u8 = ptr::null_mut();
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let zero_range = d3d12::D3D12_RANGE { ..mem::zeroed() };
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let zero_range = d3d12::D3D12_RANGE { ..mem::zeroed() };
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let range = d3d12::D3D12_RANGE {
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Begin: offset,
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End: offset + size,
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};
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explain_error(
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explain_error(
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(*self.get()).Map(0, &zero_range, &mut mapped_memory as *mut _ as *mut _),
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(*self.get()).Map(0, &zero_range, &mut mapped_memory as *mut _ as *mut _),
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"could not map GPU mem to CPU mem",
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"could not map GPU mem to CPU mem",
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)?;
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)?;
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ptr::copy_nonoverlapping(data, mapped_memory, count);
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ptr::copy_nonoverlapping(data, mapped_memory.add(offset), size);
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(*self.get()).Unmap(0, ptr::null());
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(*self.get()).Unmap(0, &range);
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Ok(())
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Ok(())
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}
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}
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pub unsafe fn read_resource<T>(&self, dst: *mut T, count: usize) -> Result<(), Error> {
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pub unsafe fn read_resource(
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let mut mapped_memory = ptr::null_mut();
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&self,
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let n_bytes = count * std::mem::size_of::<T>();
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dst: *mut u8,
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offset: usize,
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size: usize,
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) -> Result<(), Error> {
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let mut mapped_memory: *mut u8 = ptr::null_mut();
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let range = d3d12::D3D12_RANGE {
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let range = d3d12::D3D12_RANGE {
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Begin: 0,
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Begin: offset,
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End: n_bytes,
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End: offset + size,
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};
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};
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let zero_range = d3d12::D3D12_RANGE { ..mem::zeroed() };
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let zero_range = d3d12::D3D12_RANGE { ..mem::zeroed() };
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explain_error(
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explain_error(
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(*self.get()).Map(0, &range, &mut mapped_memory as *mut _ as *mut _),
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(*self.get()).Map(0, &range, &mut mapped_memory as *mut _ as *mut _),
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"could not map GPU mem to CPU mem",
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"could not map GPU mem to CPU mem",
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)?;
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)?;
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ptr::copy_nonoverlapping(mapped_memory as *const T, dst, count);
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ptr::copy_nonoverlapping(mapped_memory.add(offset), dst, size);
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(*self.get()).Unmap(0, &zero_range);
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(*self.get()).Unmap(0, &zero_range);
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Ok(())
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Ok(())
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}
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}
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@ -1163,7 +1175,7 @@ impl Drop for Event {
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}
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}
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impl GraphicsCommandList {
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impl GraphicsCommandList {
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pub unsafe fn as_raw_list(&self) -> *mut d3d12::ID3D12CommandList {
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pub unsafe fn as_raw_command_list(&self) -> *mut d3d12::ID3D12CommandList {
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self.0.as_raw() as *mut d3d12::ID3D12CommandList
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self.0.as_raw() as *mut d3d12::ID3D12CommandList
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}
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}
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