alex/agb
1
0
Fork 0
mirror of https://github.com/italicsjenga/agb.git synced 2024-12-23 08:11:33 +11:00
Code Issues Packages Projects Releases Wiki Activity

Let rust do the register allocation

Browse source
This commit is contained in:
Gwilym Inzani 2023-09-06 08:34:14 +01:00
parent bb57298c54
commit ed2e7dec5c
1 changed files with 16 additions and 16 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

32
agb/src/display/tiled/vram_manager.rs
View file

@ -388,27 +388,27 @@ impl VRamManager {
match tile_format { match tile_format {
TileFormat::FourBpp => core::arch::asm!( TileFormat::FourBpp => core::arch::asm!(
".rept 2", ".rept 2",
"ldmia r0!, {{r2-r5}}", "ldmia {src}!, {{{tmp1},{tmp2},{tmp3},{tmp4}}}",
"stmia r1!, {{r2-r5}}", "stmia {dest}!, {{{tmp1},{tmp2},{tmp3},{tmp4}}}",
".endr", ".endr",
inout("r0") tile_data_start => _, src = inout(reg) tile_data_start => _,
inout("r1") target_location => _, dest = inout(reg) target_location => _,
out("r2") _, tmp1 = out(reg) _,
out("r3") _, tmp2 = out(reg) _,
out("r4") _, tmp3 = out(reg) _,
out("r5") _, tmp4 = out(reg) _,
), ),
TileFormat::EightBpp => core::arch::asm!( TileFormat::EightBpp => core::arch::asm!(
".rept 4", ".rept 4",
"ldmia r0!, {{r2-r5}}", "ldmia {src}!, {{{tmp1},{tmp2},{tmp3},{tmp4}}}",
"stmia r1!, {{r2-r5}}", "stmia {dest}!, {{{tmp1},{tmp2},{tmp3},{tmp4}}}",
".endr", ".endr",
inout("r0") tile_data_start => _, src = inout(reg) tile_data_start => _,
inout("r1") target_location => _, dest = inout(reg) target_location => _,
out("r2") _, tmp1 = out(reg) _,
out("r3") _, tmp2 = out(reg) _,
out("r4") _, tmp3 = out(reg) _,
out("r5") _, tmp4 = out(reg) _,
), ),
} }
} }