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embedded-hal 0.2.7 -> embedded-hal-nb 1.0.0

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This commit is contained in:
Alex Janka 2024-11-17 13:31:32 +11:00
parent 21e0cb309a
commit efb7bc6cd1
2 changed files with 13 additions and 5 deletions
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2
agb/Cargo.toml
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@ -35,7 +35,7 @@ once_cell = { version = "1.20.1", default-features = false, features = [
"critical-section",
] }
critical-section = { version = "1.1.2", features = ["restore-state-u16"] }
embedded-hal = "0.2.7"
embedded-hal-nb = "1.0.0"
nb = "1.1"
[package.metadata.docs.rs]

16
agb/src/serial_link/mod.rs
View file

@ -1,6 +1,6 @@
use core::ops::{Deref, DerefMut};
use embedded_hal::serial::{Read, Write};
use embedded_hal_nb::serial::{Read, Write};
use crate::memory_mapped::MemoryMapped;
@ -13,6 +13,14 @@ pub enum LinkPortError {
GbaErrorBit,
}
impl embedded_hal_nb::serial::Error for LinkPortError {
fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
match self {
LinkPortError::GbaErrorBit => embedded_hal_nb::serial::ErrorKind::Other,
}
}
}
pub struct LinkPortUart;
impl LinkPortUart {
@ -29,9 +37,11 @@ impl LinkPortUart {
}
}
impl Read<u8> for LinkPortUart {
impl embedded_hal_nb::serial::ErrorType for LinkPortUart {
type Error = LinkPortError;
}
impl Read<u8> for LinkPortUart {
fn read(&mut self) -> Result<u8, nb::Error<LinkPortError>> {
match SioControlReg::from(SIOCNT.get()) {
v if *v.error => Err(nb::Error::Other(LinkPortError::GbaErrorBit)),
@ -42,8 +52,6 @@ impl Read<u8> for LinkPortUart {
}
impl Write<u8> for LinkPortUart {
type Error = LinkPortError;
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
match self.flush() {
Ok(_) => {