gb-emu/src/main.rs

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4.4 KiB
Rust
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#![feature(exclusive_range_pattern)]
use clap::Parser;
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use std::{fs, io};
/// Simple program to greet a person
#[derive(Parser, Debug)]
#[command(author, version, about, long_about = None)]
struct Args {
/// ROM path
#[arg(short, long)]
rom: String,
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/// BootROM path
#[arg(short, long)]
bootrom: String,
}
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type Address = u16;
type ROM = Vec<u8>;
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#[derive(Clone, Copy)]
struct Inner {
left: u8,
right: u8,
}
union Register {
as_u8s: Inner,
as_u16: u16,
}
struct Memory {
rom: ROM,
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vram: [u8; 8192],
ram: [u8; 8192],
}
impl Memory {
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fn init(rom: ROM) -> Self {
Self {
rom,
vram: [0x0; 8192],
ram: [0x0; 8192],
}
}
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fn get(&self, address: Address) -> u8 {
match address {
0x0..0x8000 => {
// rom access
// todo - switchable rom banks
return self.rom[address as usize];
}
0x8000..0xA000 => {
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return self.vram[(address - 0x8000) as usize];
}
0xA000..0xC000 => {
panic!("switchable ram bank");
}
0xC000..0xE000 => {
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return self.ram[(address - 0xC000) as usize];
}
0xE000..0xFE00 => {
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return self.ram[(address - 0xE000) as usize];
}
0xFE00..0xFEA0 => {
panic!("sprite attrib memory");
}
0xFEA0..0xFF00 => {
panic!("empty")
}
0xFF00..0xFF4C => {
panic!("I/O");
}
0xFF4C..0xFF80 => {
panic!("empty");
}
0xFF80..0xFFFF => {
panic!("internal ram");
}
0xFFFF => {
panic!("interrupt enable register");
}
}
}
}
struct State {
af: Register,
bc: Register,
de: Register,
hl: Register,
sp: Register,
pc: Register,
}
impl Default for State {
fn default() -> Self {
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// default post-bootrom values
Self {
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af: Register { as_u16: 0x01B0 },
bc: Register { as_u16: 0x0013 },
de: Register { as_u16: 0x00D8 },
hl: Register { as_u16: 0x014D },
sp: Register { as_u16: 0xFFFE },
pc: Register { as_u16: 0x0100 },
}
}
}
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struct CPU {
memory: Memory,
state: State,
}
impl CPU {
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fn exec_next(&mut self) -> u8 {
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let opcode = self.next_opcode();
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println!("opcode: {:#X}", opcode);
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match opcode {
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0x0 => {
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// noop
}
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0x01 => {
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self.state.bc.as_u8s.left = self.next_opcode();
self.state.bc.as_u8s.right = self.next_opcode();
}
0x11 => {
self.state.de.as_u8s.left = self.next_opcode();
self.state.de.as_u8s.right = self.next_opcode();
}
0x21 => {
self.state.de.as_u8s.left = self.next_opcode();
self.state.de.as_u8s.right = self.next_opcode();
}
0x2C => {
unsafe {
self.state.hl.as_u8s.right += 1;
};
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}
0x66 => {
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unsafe {
self.state.hl.as_u8s.left = self.memory.get(self.state.hl.as_u16);
};
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}
0xC3 => {
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let (a, b) = (self.next_opcode(), self.next_opcode());
self.state.pc.as_u8s.left = a;
self.state.pc.as_u8s.right = b;
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}
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_ => {
panic!("unimplemented opcode: {:#X}", opcode);
}
};
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return opcode;
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}
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fn next_opcode(&mut self) -> u8 {
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unsafe {
let opcode = self.memory.get(self.state.pc.as_u16);
self.state.pc.as_u16 += 0x1;
return opcode;
};
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}
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}
fn main() {
let args = Args::parse();
let rom: ROM = fs::read(args.rom).expect("Could not load ROM");
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let _bootrom: ROM = fs::read(args.bootrom).expect("Could not load BootROM");
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let mut cpu = CPU {
memory: Memory::init(rom),
state: State::default(),
};
loop {
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cpu.exec_next();
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pause();
}
}
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fn pause() {
io::stdin().read_line(&mut String::new()).unwrap();
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}