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prepare for dealing with all registers

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This commit is contained in:
Alex Janka 2023-02-13 14:16:58 +11:00
parent 0b2378d160
commit 2bc9d0f665
1 changed files with 3 additions and 3 deletions
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6
src/processor/memory/mmio/apu.rs
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@ -80,6 +80,8 @@ impl Apu {
v = set_or_clear_bit(v, 3, self.channels.four.enabled);
v
}
0xFF15 | 0xFF1F | 0xFF27..0xFF30 => 0xFF,
0x0..0xFF10 | 0xFF40..0xFFFF | 0xFFFF => panic!("non-apu addr in apu"),
_ => self.mem[reg(addr)],
}
}
@ -94,9 +96,7 @@ impl Apu {
self.mem[reg(addr)] = (self.mem[reg(addr)] & 0b10111111) | (data & 0b01000000)
}
0xFF26 => self.apu_enable = (1 << 7) == (data & 0b10000000),
0xFF11..0xFF1A | 0xFF1B | 0xFF1D..0xFF23 | 0xFF24..0xFF40 => {
println!("BANNED write in APU: {data:#X} to {addr:#X}")
}
0xFF11..0xFF1A | 0xFF1B | 0xFF1D..0xFF23 | 0xFF24..0xFF40 => self.mem[reg(addr)] = data,
0x0..0xFF10 | 0xFF40..0xFFFF | 0xFFFF => panic!("non-apu addr in apu"),
}
}