bootrom as option
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parent
932e70a443
commit
3df569a7a1
20
src/main.rs
20
src/main.rs
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@ -45,11 +45,7 @@ struct Args {
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/// BootROM path
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/// BootROM path
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#[arg(short, long)]
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#[arg(short, long)]
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bootrom: String,
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bootrom: Option<String>,
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/// Just run BootROM
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#[arg(long)]
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run_bootrom: bool,
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/// Verbose print
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/// Verbose print
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#[arg(short, long)]
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#[arg(short, long)]
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@ -102,12 +98,18 @@ fn main() {
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return;
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return;
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}
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}
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};
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};
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let bootrom: Vec<u8> = match fs::read(args.bootrom) {
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Ok(data) => data,
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let bootrom_enabled = args.bootrom.is_some();
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let bootrom: Option<Vec<u8>> = if let Some(path) = args.bootrom {
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match fs::read(path) {
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Ok(data) => Some(data),
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Err(e) => {
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Err(e) => {
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println!("Error reading bootROM: {e}");
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println!("Error reading bootROM: {e}");
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return;
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return;
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}
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}
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}
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} else {
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None
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};
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};
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let mut window = Window::new(
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let mut window = Window::new(
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@ -125,10 +127,10 @@ fn main() {
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window.topmost(true);
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window.topmost(true);
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let mut cpu = Cpu::new(
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let mut cpu = Cpu::new(
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Memory::init(bootrom, args.run_bootrom, rom),
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Memory::init(bootrom, rom),
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window,
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window,
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args.tile_window,
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args.tile_window,
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args.run_bootrom,
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bootrom_enabled,
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Gilrs::new().unwrap(),
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Gilrs::new().unwrap(),
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);
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);
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@ -11,8 +11,7 @@ pub(crate) type Address = u16;
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#[allow(dead_code)]
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#[allow(dead_code)]
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pub struct Memory {
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pub struct Memory {
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bootrom: Vec<u8>,
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bootrom: Option<Vec<u8>>,
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bootrom_enabled: bool,
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rom: Rom,
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rom: Rom,
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vram: [u8; 8192],
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vram: [u8; 8192],
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ram: [u8; 8192],
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ram: [u8; 8192],
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@ -30,10 +29,9 @@ pub struct Memory {
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}
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}
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impl Memory {
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impl Memory {
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pub fn init(bootrom: Vec<u8>, bootrom_enabled: bool, rom: Rom) -> Self {
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pub fn init(bootrom: Option<Vec<u8>>, rom: Rom) -> Self {
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Self {
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Self {
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bootrom,
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bootrom,
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bootrom_enabled,
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rom,
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rom,
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vram: [0x0; 8192],
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vram: [0x0; 8192],
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ram: [0x0; 8192],
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ram: [0x0; 8192],
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@ -56,8 +54,8 @@ impl Memory {
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0x0..0x8000 => {
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0x0..0x8000 => {
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// rom access
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// rom access
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// todo - switchable rom banks
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// todo - switchable rom banks
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if self.bootrom_enabled && ((address as usize) < self.bootrom.len()) {
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if let Some(bootrom) = &self.bootrom && (address as usize) < bootrom.len() {
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self.bootrom[address as usize]
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bootrom[address as usize]
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} else {
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} else {
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self.rom.get(address)
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self.rom.get(address)
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}
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}
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@ -91,7 +89,7 @@ impl Memory {
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0xFE00..0xFEA0 => self.oam[(address - 0xFE00) as usize] = data,
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0xFE00..0xFEA0 => self.oam[(address - 0xFE00) as usize] = data,
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0xFEA0..0xFF00 => {}
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0xFEA0..0xFF00 => {}
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0xFF00..0xFF4C => self.set_io(address, data),
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0xFF00..0xFF4C => self.set_io(address, data),
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0xFF50 => self.bootrom_enabled = false,
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0xFF50 => self.bootrom = None,
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0xFF4C..0xFF50 | 0xFF51..0xFF80 => {}
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0xFF4C..0xFF50 | 0xFF51..0xFF80 => {}
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0xFF80..0xFFFF => self.cpu_ram[(address - 0xFF80) as usize] = data,
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0xFF80..0xFFFF => self.cpu_ram[(address - 0xFF80) as usize] = data,
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0xFFFF => {
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0xFFFF => {
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@ -50,7 +50,7 @@ impl Cpu {
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run_bootrom: bool,
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run_bootrom: bool,
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gamepad_handler: Gilrs,
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gamepad_handler: Gilrs,
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) -> Self {
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) -> Self {
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if run_bootrom {
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if !run_bootrom {
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memory.cpu_ram_init();
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memory.cpu_ram_init();
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}
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}
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Self {
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Self {
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