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fixed vram dma registers!!

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This commit is contained in:
Alex Janka 2023-04-25 18:49:18 +10:00
parent 3b853408f7
commit 4a63e38b29
1 changed files with 8 additions and 1 deletions
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9
lib/src/processor/memory/mmio/cgb/vram_dma.rs
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@ -54,6 +54,11 @@ impl VramDma {
} }
} }
fn reset_registers(&mut self) {
self.source = 0;
self.destination = 0x8000;
}
pub(crate) fn set_register(&mut self, address: VramDmaAddress, data: u8) { pub(crate) fn set_register(&mut self, address: VramDmaAddress, data: u8) {
match address.inner() { match address.inner() {
0xFF51 => self.source.set_high(data), 0xFF51 => self.source.set_high(data),
@ -95,6 +100,7 @@ where
cgb_peripherals.vram_dma.source += length; cgb_peripherals.vram_dma.source += length;
cgb_peripherals.vram_dma.destination += length; cgb_peripherals.vram_dma.destination += length;
cgb_peripherals.vram_dma.mode = DmaMode::Waiting; cgb_peripherals.vram_dma.mode = DmaMode::Waiting;
cgb_peripherals.vram_dma.reset_registers();
((l as usize) + 1) * 8 ((l as usize) + 1) * 8
} }
DmaMode::Hblank(l, ref mut progress) => { DmaMode::Hblank(l, ref mut progress) => {
@ -109,7 +115,8 @@ where
cgb_peripherals.vram_dma.destination += length; cgb_peripherals.vram_dma.destination += length;
*progress += 1; *progress += 1;
if *progress > (l as u16) { if *progress > (l as u16) {
cgb_peripherals.vram_dma.mode = DmaMode::Waiting cgb_peripherals.vram_dma.mode = DmaMode::Waiting;
cgb_peripherals.vram_dma.reset_registers();
} }
8 8
} else { } else {