fix opcodes e8 & f8... WE PASS CPU_INSTRS!!!!!
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5fbc661f5c
commit
567cbf0264
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@ -1,6 +1,6 @@
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use crate::{
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processor::{Cpu, Direction, Flags, SplitRegister},
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util::{get_bit, get_rotation_carry, rotate, Nibbles},
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util::{as_signed, get_bit, get_rotation_carry, rotate, Nibbles},
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};
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use std::ops::{BitAnd, BitOr};
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@ -106,18 +106,13 @@ impl Cpu {
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}
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}
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pub(crate) fn sp_add(&mut self, first: u16, second: i8) -> u16 {
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let (result, carry) = first.overflowing_add_signed(second.into());
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pub(crate) fn sp_add(&mut self, first: u16, second: u8) -> u16 {
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self.add_u8s(first.get_low(), second, false);
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self.clear_flag(Flags::NSubtract);
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self.clear_flag(Flags::Zero);
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self.set_or_clear_flag(Flags::Carry, carry);
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self.set_or_clear_flag(
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Flags::HalfCarry,
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(((first & 0xFFF).wrapping_add_signed(<i8 as Into<i16>>::into(second) & 0xFFF))
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& 0x1000)
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== 0x1000,
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);
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result
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first.wrapping_add_signed(as_signed(second).into())
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}
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pub(crate) fn add_u8s(&mut self, first: u8, second: u8, with_carry: bool) -> u8 {
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@ -1130,7 +1130,7 @@ impl Cpu {
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4
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}
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0xE8 => {
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let v = as_signed(self.ld_immediate_byte());
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let v = self.ld_immediate_byte();
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self.reg.sp = self.sp_add(self.reg.sp, v);
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4
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}
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@ -1191,7 +1191,7 @@ impl Cpu {
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4
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}
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0xF8 => {
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let v = as_signed(self.ld_immediate_byte());
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let v = self.ld_immediate_byte();
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self.reg.hl = self.sp_add(self.reg.sp, v);
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3
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}
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