2018-12-09 04:57:38 +11:00
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# BIOS
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2018-12-16 19:21:43 +11:00
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* **Address Span:** `0x0` to `0x3FFF` (16k)
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The [BIOS](https://en.wikipedia.org/wiki/BIOS) of the GBA is a small read-only
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portion of memory at the very base of the address space. However, it is also
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hardware protected against reading, so if you try to read from BIOS memory when
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the program counter isn't pointed into the BIOS (eg: any time code _you_ write
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is executing) then you get [basically garbage
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data](https://problemkaputt.de/gbatek.htm#gbaunpredictablethings) back.
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So we're not going to spend time here talking about what bits to read or write
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within BIOS memory like we do with the other sections. Instead we're going to
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spend time talking about [inline
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assembly](https://doc.rust-lang.org/unstable-book/language-features/asm.html)
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([tracking issue](https://github.com/rust-lang/rust/issues/29722)) and then use
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it to call the [GBA BIOS
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Functions](https://problemkaputt.de/gbatek.htm#biosfunctions).
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Note that BIOS calls have _more overhead than normal function calls_, so don't
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2018-12-16 20:12:34 +11:00
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go using them all over the place if you don't have to. They're also usually
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written more to be compact in terms of code than for raw speed, so you actually
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can out speed them in some cases. Between the increased overhead and not being
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as speed optimized, you can sometimes do a faster job without calling the BIOS
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at all. (TODO: investigate more about what parts of the BIOS we could
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potentially offer faster alternatives for.)
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2018-12-16 19:21:43 +11:00
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I'd like to take a moment to thank [Marc Brinkmann](https://github.com/mbr)
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(with contributions from [Oliver Schneider](https://github.com/oli-obk) and
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[Philipp Oppermann](https://github.com/phil-opp)) for writing [this blog
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post](http://embed.rs/articles/2016/arm-inline-assembly-rust/). It's at least
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ten times the tutorial quality as the `asm` entry in the Unstable Book has. In
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2018-12-16 20:02:16 +11:00
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fairness to the Unstable Book, the actual spec of how inline ASM works in rust
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is "basically what clang does", and that's specified as "basically what GCC
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does", and that's basically/shockingly not specified much at all despite GCC
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being like 30 years old.
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2018-12-16 19:21:43 +11:00
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2018-12-16 20:02:16 +11:00
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So let's be slow and pedantic about this process.
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2018-12-16 19:21:43 +11:00
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## Inline ASM
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2018-12-16 20:02:16 +11:00
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**Fair Warning:** Inline asm is one of the least stable parts of Rust overall,
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and if you write bad things you can trigger internal compiler errors and panics
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and crashes and make LLVM choke and die without explanation. If you write some
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inline asm and then suddenly your program suddenly stops compiling without
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explanation, try commenting out that whole inline asm use and see if it's
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causing the problem. Double check that you've written every single part of the
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asm call absolutely correctly, etc, etc.
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2018-12-17 05:04:56 +11:00
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**Bonus Warning:** The general information that follows regarding the asm macro
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is consistent from system to system, but specific information about register
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names, register quantities, asm instruction argument ordering, and so on is
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specific to ARM on the GBA. If you're programming for any other device you'll
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need to carefully investigate that before you begin.
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2018-12-16 20:02:16 +11:00
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Now then, with those out of the way, the inline asm docs describe an asm call as
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looking like this:
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2018-12-16 19:21:43 +11:00
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```rust
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asm!(assembly template
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: output operands
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: input operands
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: clobbers
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: options
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);
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```
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And once you stick a lot of stuff in there it can _absolutely_ be hard to
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remember the ordering of the elements. So we'll start with a code block that
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2018-12-16 20:02:16 +11:00
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has some comments thrown in on each line:
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2018-12-16 19:21:43 +11:00
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```rust
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asm!(/* ASM */ TODO
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:/* OUT */ TODO
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:/* INP */ TODO
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:/* CLO */ TODO
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:/* OPT */
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);
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```
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2018-12-16 20:02:16 +11:00
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Now we have to decide what we're gonna write. Obviously we're going to do some
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instructions, but those instructions use registers, and how are we gonna talk
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about them? We've got two choices.
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1) We can pick each and every register used by specifying exact register names.
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In THUMB mode we have 8 registers available, named `r0` through `r7`. If you
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switch into 32-bit mode there's additional registers that are also available.
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2) We can specify slots for registers we need and let LLVM decide. In this style
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you name your slots `$0`, `$1` and so on. Slot numbers are assigned first to
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all specified outputs, then to all specified inputs, in the order that you
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list them.
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In the case of the GBA BIOS, each BIOS function has pre-designated input and
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output registers, so we will use the first style. If you use inline ASM in other
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parts of your code you're free to use the second style.
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### Assembly
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This is just one big string literal. You write out one instruction per line, and
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excess whitespace is ignored. You can also do comments within your assembly
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using `;` to start a comment that goes until the end of the line.
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Assembly convention doesn't consider it unreasonable to comment potentially as
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much as _every single line_ of asm that you write when you're getting used to
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things. Or even if you are used to things. This is cryptic stuff, there's a
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reason we avoid writing in it as much as possible.
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Remember that our Rust code is in 16-bit mode. You _can_ switch to 32-bit mode
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within your asm as long as you switch back by the time the block ends. Otherwise
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you'll have a bad time.
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### Outputs
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A comma separated list. Each entry looks like
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* `"constraint" (binding)`
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An output constraint starts with a symbol:
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* `=` for write only
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* `+` for reads and writes
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* `&` for for "early clobber", meaning that you'll write to this at some point
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before all input values have been read. It prevents this register from being
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assigned to an input register.
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Followed by _either_ the letter `r` (if you want LLVM to pick the register to
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use) or curly braces around a specific register (if you want to pick).
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2018-12-17 09:17:30 +11:00
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* The binding can be any single 32-bit or smaller value.
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2018-12-16 20:02:16 +11:00
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* If your binding has bit pattern requirements ("must be non-zero", etc) you are
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responsible for upholding that.
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* If your binding type will try to `Drop` later then you are responsible for it
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being in a fit state to do that.
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* The binding must be either a mutable binding or a binding that was
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pre-declared but not yet assigned.
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Anything else is UB.
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### Inputs
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This is a similar comma separated list.
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* `"constraint" (binding)`
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An input constraint doesn't have the symbol prefix, you just pick either `r` or
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a named register with curly braces around it.
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2018-12-17 09:17:30 +11:00
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* An input binding must be a single 32-bit or smaller value.
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2018-12-16 20:02:16 +11:00
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* An input binding _should_ be a type that is `Copy` but this is not an absolute
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requirement. Having the input be read is semantically similar to using
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`core::ptr::read(&binding)` and forgetting the value when you're done.
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### Clobbers
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Sometimes your asm will touch registers other than the ones declared for input
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and output.
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Clobbers are declared as a comma separated list of string literals naming
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specific registers. You don't use curly braces with clobbers.
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LLVM _needs_ to know this information. It can move things around to keep your
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data safe, but only if you tell it what's about to happen.
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Failure to define all of your clobbers can cause UB.
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### Options
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2018-12-17 09:17:30 +11:00
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There's only one option we'd care to specify. That option is "volatile".
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2018-12-16 20:02:16 +11:00
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Just like with a function call, LLVM will skip a block of asm if it doesn't see
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that any outputs from the asm were used later on. Nearly every single BIOS call
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(other than the math operations) will need to be marked as "volatile".
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2018-12-16 20:02:16 +11:00
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### BIOS ASM
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2018-12-16 19:21:43 +11:00
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* Inputs are always `r0`, `r1`, `r2`, and/or `r3`, depending on function.
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* Outputs are always zero or more of `r0`, `r1`, and `r3`.
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* Any of the output registers that aren't actually used should be marked as
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clobbered.
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* All other registers are unaffected.
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All of the GBA BIOS calls are performed using the
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[swi](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/BABFCEEG.html)
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instruction, combined with a value depending on what BIOS function you're trying
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to invoke. If you're in 16-bit code you use the value directly, and if you're in
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32-bit mode you shift the value up by 16 bits first.
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### Example BIOS Function: Division
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2018-12-17 09:17:30 +11:00
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For our example we'll use the division function, because GBATEK gives very clear
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instructions on how each register is used with that one:
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```txt
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Signed Division, r0/r1.
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r0 signed 32bit Number
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r1 signed 32bit Denom
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Return:
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r0 Number DIV Denom ;signed
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r1 Number MOD Denom ;signed
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r3 ABS (Number DIV Denom) ;unsigned
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For example, incoming -1234, 10 should return -123, -4, +123.
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The function usually gets caught in an endless loop upon division by zero.
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```
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2018-12-16 20:22:07 +11:00
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The math folks tell me that the `r1` value should be properly called the
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"remainder" not the "modulus". We'll go with that for our function, doesn't hurt
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to use the correct names. Our Rust function has an assert against dividing by
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2018-12-16 20:22:07 +11:00
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`0`, then we name some bindings _without_ giving them a value, we make the asm
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call, and then return what we got.
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2018-12-16 19:21:43 +11:00
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```rust
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pub fn div_rem(numerator: i32, denominator: i32) -> (i32, i32) {
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assert!(denominator != 0);
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let div_out: i32;
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let rem_out: i32;
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unsafe {
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asm!(/* ASM */ "swi 0x06"
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:/* OUT */ "={r0}"(div_out), "={r1}"(rem_out)
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:/* INP */ "{r0}"(numerator), "{r1}"(denominator)
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:/* CLO */ "r3"
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:/* OPT */
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);
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}
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(div_out, rem_out)
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}
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```
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2018-12-17 09:17:30 +11:00
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I _hope_ this all makes sense by now.
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# BIOS Function Definitions
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What follows is one entry for every BIOS call function, sorted by `swi` value
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(which also _kinda_ sorts them into themed groups too).
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All functions here are marked with `#[inline(always)]`, which I wouldn't
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normally bother with, but the compiler can't see that the ASM we use is
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immediately a second function call, so we want to be very sure that it gets
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inlined as much as possible. You should probably be using Link Time Optimization
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in your release mode GBA games just to get that extra boost, but
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`#[inline(always)]` will help keep debug builds going at a good speed too.
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The entries here in the book are basically just copy pasting the source for each
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function from the `gba::bios` module of the crate. The actual asm invocation
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itself is uninteresting, but I've attempted to make the documentation for each
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function clear and complete.
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## CPU Control / Reset
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### Soft Reset (0x00)
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```rust
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/// (`swi 0x00`) SoftReset the device.
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///
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/// This function does not ever return.
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///
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/// Instead, it clears the top `0x200` bytes of IWRAM (containing stacks, and
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/// BIOS IRQ vector/flags), re-initializes the system, supervisor, and irq stack
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/// pointers (new values listed below), sets `r0` through `r12`, `LR_svc`,
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/// `SPSR_svc`, `LR_irq`, and `SPSR_irq` to zero, and enters system mode. The
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/// return address is loaded into `r14` and then the function jumps there with
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/// `bx r14`.
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///
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/// * sp_svc: `0x300_7FE0`
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/// * sp_irq: `0x300_7FA0`
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/// * sp_sys: `0x300_7F00`
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/// * Zero-filled Area: `0x300_7E00` to `0x300_7FFF`
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/// * Return Address: Depends on the 8-bit flag value at `0x300_7FFA`. In either
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/// case execution proceeds in ARM mode.
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/// * zero flag: `0x800_0000` (ROM), which for our builds means that the
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/// `crt0` program to execute (just like with a fresh boot), and then
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/// control passes into `main` and so on.
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/// * non-zero flag: `0x200_0000` (RAM), This is where a multiboot image would
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/// go if you were doing a multiboot thing. However, this project doesn't
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/// support multiboot at the moment. You'd need an entirely different build
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/// pipeline because there's differences in header format and things like
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/// that. Perhaps someday, but probably not even then. Submit the PR for it
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/// if you like!
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///
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/// ## Safety
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///
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/// This functions isn't ever unsafe to the current iteration of the program.
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/// However, because not all memory is fully cleared you theoretically could
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/// threaten the _next_ iteration of the program that runs. I'm _fairly_
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/// convinced that you can't actually use this to force purely safe code to
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/// perform UB, but such a scenario might exist.
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#[inline(always)]
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pub unsafe fn soft_reset() -> ! {
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asm!(/* ASM */ "swi 0x00"
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:/* OUT */ // none
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:/* INP */ // none
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:/* CLO */ // none
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:/* OPT */ "volatile"
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);
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core::hint::unreachable_unchecked()
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}
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```
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### Register / RAM Reset (0x01)
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```rust
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/// (`swi 0x01`) RegisterRamReset.
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///
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/// Clears the portions of memory given by the `flags` value, sets the Display
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/// Control Register to `0x80` (forced blank and nothing else), then returns.
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///
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/// * Flag bits:
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/// 0) Clears the 256k of EWRAM (don't use if this is where your function call
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/// will return to!)
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/// 1) Clears the 32k of IWRAM _excluding_ the last `0x200` bytes (see also:
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/// the `soft_reset` function).
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/// 2) Clears all Palette data.
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/// 3) Clears all VRAM.
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/// 4) Clears all OAM (reminder: a zeroed obj isn't disabled!)
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/// 5) Reset SIO registers (resets them to general purpose mode)
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/// 6) Reset Sound registers
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/// 7) Reset all IO registers _other than_ SIO and Sound
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///
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/// **Bug:** The least significant byte of `SIODATA32` is always zeroed, even if
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/// bit 5 was not enabled. This is sadly a bug in the design of the GBA itself.
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///
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/// ## Safety
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///
|
|
|
|
/// It is generally a safe operation to suddenly clear any part of the GBA's
|
|
|
|
/// memory, except in the case that you were executing out of IWRAM and clear
|
|
|
|
/// that. If you do that you return to nothing and have a bad time.
|
|
|
|
#[inline(always)]
|
|
|
|
pub unsafe fn register_ram_reset(flags: u8) {
|
|
|
|
asm!(/* ASM */ "swi 0x01"
|
|
|
|
:/* OUT */ // none
|
|
|
|
:/* INP */ "{r0}"(flags)
|
|
|
|
:/* CLO */ // none
|
|
|
|
:/* OPT */ "volatile"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
//TODO(lokathor): newtype this flag business.
|
|
|
|
```
|
|
|
|
|
|
|
|
### Halt (0x02)
|
|
|
|
### Stop / Sleep (0x03)
|
|
|
|
### Interrupt Wait (0x04)
|
|
|
|
### VBlank Interrupt Wait (0x05)
|
|
|
|
|
|
|
|
## Math
|
|
|
|
|
|
|
|
For the math functions to make sense you'll want to be familiar with the fixed
|
|
|
|
point math concepts from the [Fixed Only](../01-quirks/02-fixed_only.md) section
|
|
|
|
of the Quirks chapter.
|
|
|
|
|
|
|
|
### Div (0x06)
|
|
|
|
|
|
|
|
```rust
|
|
|
|
/// (`swi 0x06`) Software Division and Remainder.
|
|
|
|
///
|
|
|
|
/// ## Panics
|
|
|
|
///
|
|
|
|
/// If the denominator is 0.
|
|
|
|
#[inline(always)]
|
|
|
|
pub fn div_rem(numerator: i32, denominator: i32) -> (i32, i32) {
|
|
|
|
assert!(denominator != 0);
|
|
|
|
let div_out: i32;
|
|
|
|
let rem_out: i32;
|
|
|
|
unsafe {
|
|
|
|
asm!(/* ASM */ "swi 0x06"
|
|
|
|
:/* OUT */ "={r0}"(div_out), "={r1}"(rem_out)
|
|
|
|
:/* INP */ "{r0}"(numerator), "{r1}"(denominator)
|
|
|
|
:/* CLO */ "r3"
|
|
|
|
:/* OPT */
|
|
|
|
);
|
|
|
|
}
|
|
|
|
(div_out, rem_out)
|
|
|
|
}
|
|
|
|
|
|
|
|
/// As `div_rem`, but keeping only the `div` part.
|
|
|
|
#[inline(always)]
|
|
|
|
pub fn div(numerator: i32, denominator: i32) -> i32 {
|
|
|
|
div_rem(numerator, denominator).0
|
|
|
|
}
|
|
|
|
|
|
|
|
/// As `div_rem`, but keeping only the `rem` part.
|
|
|
|
#[inline(always)]
|
|
|
|
pub fn rem(numerator: i32, denominator: i32) -> i32 {
|
|
|
|
div_rem(numerator, denominator).1
|
|
|
|
}
|
|
|
|
```
|
|
|
|
|
|
|
|
### DivArm (0x07)
|
|
|
|
|
|
|
|
This is exactly like Div, but with the input arguments swapped. It ends up being
|
|
|
|
exactly 3 cycles slower than normal Div because it swaps the input arguments to
|
|
|
|
the positions that Div is expecting ("move r0 -> r3, mov r1 -> r0, mov r3 ->
|
|
|
|
r1") and then goes to the normal Div function.
|
|
|
|
|
|
|
|
You can basically forget about this function. It's for compatibility with other
|
|
|
|
ARM software conventions, which we don't need. Just use normal Div.
|
|
|
|
|
|
|
|
### Sqrt (0x08)
|
|
|
|
|
|
|
|
```rust
|
|
|
|
/// (`swi 0x08`) Integer square root.
|
|
|
|
///
|
|
|
|
/// If you want more fractional precision, you can shift your input to the left
|
|
|
|
/// by `2n` bits to get `n` more bits of fractional precision in your output.
|
|
|
|
#[inline(always)]
|
|
|
|
pub fn sqrt(val: u32) -> u16 {
|
|
|
|
let out: u16;
|
|
|
|
unsafe {
|
|
|
|
asm!(/* ASM */ "swi 0x08"
|
|
|
|
:/* OUT */ "={r0}"(out)
|
|
|
|
:/* INP */ "{r0}"(val)
|
|
|
|
:/* CLO */ "r1", "r3"
|
|
|
|
:/* OPT */
|
|
|
|
);
|
|
|
|
}
|
|
|
|
out
|
|
|
|
}
|
|
|
|
```
|
|
|
|
|
|
|
|
### ArcTan (0x09)
|
|
|
|
|
|
|
|
```rust
|
|
|
|
/// (`swi 0x09`) Gives the arctangent of `theta`.
|
|
|
|
///
|
|
|
|
/// The input format is 1 bit for sign, 1 bit for integral part, 14 bits for
|
|
|
|
/// fractional part.
|
|
|
|
///
|
|
|
|
/// Accuracy suffers if `theta` is less than `-pi/4` or greater than `pi/4`.
|
|
|
|
#[inline(always)]
|
|
|
|
pub fn atan(theta: i16) -> i16 {
|
|
|
|
let out: i16;
|
|
|
|
unsafe {
|
|
|
|
asm!(/* ASM */ "swi 0x09"
|
|
|
|
:/* OUT */ "={r0}"(out)
|
|
|
|
:/* INP */ "{r0}"(theta)
|
|
|
|
:/* CLO */ "r1", "r3"
|
|
|
|
:/* OPT */
|
|
|
|
);
|
|
|
|
}
|
|
|
|
out
|
|
|
|
}
|
|
|
|
```
|
|
|
|
|
|
|
|
### ArcTan2 (0x0A)
|
|
|
|
|
|
|
|
```rust
|
|
|
|
/// (`swi 0x0A`) Gives the atan2 of `y` over `x`.
|
|
|
|
///
|
|
|
|
/// The output `theta` value maps into the range `[0, 2pi)`, or `0 .. 2pi` if
|
|
|
|
/// you prefer Rust's range notation.
|
|
|
|
///
|
|
|
|
/// `y` and `x` use the same format as with `atan`: 1 bit for sign, 1 bit for
|
|
|
|
/// integral, 14 bits for fractional.
|
|
|
|
#[inline(always)]
|
|
|
|
pub fn atan2(y: i16, x: i16) -> u16 {
|
|
|
|
let out: u16;
|
|
|
|
unsafe {
|
|
|
|
asm!(/* ASM */ "swi 0x0A"
|
|
|
|
:/* OUT */ "={r0}"(out)
|
|
|
|
:/* INP */ "{r0}"(x), "{r1}"(y)
|
|
|
|
:/* CLO */ "r3"
|
|
|
|
:/* OPT */
|
|
|
|
);
|
|
|
|
}
|
|
|
|
out
|
|
|
|
}
|
|
|
|
```
|
|
|
|
|
|
|
|
## Memory Modification
|
|
|
|
|
|
|
|
### CPU Set (0x08)
|
|
|
|
### CPU Fast Set (0x0C)
|
|
|
|
### Get BIOS Checksum (0x0D)
|
|
|
|
### BG Affine Set (0x0E)
|
|
|
|
### Obj Affine Set (0x0F)
|
|
|
|
|
|
|
|
## Decompression
|
|
|
|
|
|
|
|
### BitUnPack (0x10)
|
|
|
|
### LZ77UnCompReadNormalWrite8bit (0x11)
|
|
|
|
### LZ77UnCompReadNormalWrite16bit (0x12)
|
|
|
|
### HuffUnCompReadNormal (0x13)
|
|
|
|
### RLUnCompReadNormalWrite8bit (0x14)
|
|
|
|
### RLUnCompReadNormalWrite16bit (0x15)
|
|
|
|
### Diff8bitUnFilterWrite8bit (0x16)
|
|
|
|
### Diff8bitUnFilterWrite16bit (0x17)
|
|
|
|
### Diff16bitUnFilter (0x18)
|
|
|
|
|
|
|
|
## Sound
|
|
|
|
|
|
|
|
### SoundBias (0x19)
|
|
|
|
### SoundDriverInit (0x1A)
|
|
|
|
### SoundDriverMode (0x1B)
|
|
|
|
### SoundDriverMain (0x1C)
|
|
|
|
### SoundDriverVSync (0x1D)
|
|
|
|
### SoundChannelClear (0x1E)
|
|
|
|
### MidiKey2Freq (0x1F)
|
|
|
|
### SoundWhatever0 (0x20)
|
|
|
|
### SoundWhatever1 (0x21)
|
|
|
|
### SoundWhatever2 (0x22)
|
|
|
|
### SoundWhatever3 (0x23)
|
|
|
|
### SoundWhatever4 (0x24)
|
|
|
|
### MultiBoot (0x25)
|
|
|
|
### HardReset (0x26)
|
|
|
|
### CustomHalt (0x27)
|
|
|
|
### SoundDriverVSyncOff (0x28)
|
|
|
|
### SoundDriverVSyncOn (0x29)
|
|
|
|
### SoundGetJumpList (0x2A)
|