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<ol class="chapter"><li><a href="../00-introduction/00-index.html"><strong aria-hidden="true">1.</strong> Introduction</a></li><li><ol class="section"><li><a href="../00-introduction/01-requirements.html"><strong aria-hidden="true">1.1.</strong> Reader Requirements</a></li><li><a href="../00-introduction/02-goals_and_style.html"><strong aria-hidden="true">1.2.</strong> Book Goals and Style</a></li><li><a href="../00-introduction/03-development-setup.html"><strong aria-hidden="true">1.3.</strong> Development Setup</a></li><li><a href="../00-introduction/04-hello-magic.html"><strong aria-hidden="true">1.4.</strong> Hello, Magic</a></li><li><a href="../00-introduction/05-help_and_resources.html"><strong aria-hidden="true">1.5.</strong> Help and Resources</a></li></ol></li><li><a href="../01-quirks/00-index.html"><strong aria-hidden="true">2.</strong> Quirks</a></li><li><ol class="section"><li><a href="../01-quirks/01-no_std.html"><strong aria-hidden="true">2.1.</strong> No Std</a></li><li><a href="../01-quirks/02-fixed_only.html"><strong aria-hidden="true">2.2.</strong> Fixed Only</a></li><li><a href="../01-quirks/03-volatile_destination.html"><strong aria-hidden="true">2.3.</strong> Volatile Destination</a></li><li><a href="../01-quirks/04-newtype.html"><strong aria-hidden="true">2.4.</strong> Newtype</a></li><li><a href="../01-quirks/05-const_asserts.html"><strong aria-hidden="true">2.5.</strong> Const Asserts</a></li></ol></li><li><a href="../02-concepts/00-index.html"><strong aria-hidden="true">3.</strong> Concepts</a></li><li><ol class="section"><li><a href="../02-concepts/01-cpu.html"><strong aria-hidden="true">3.1.</strong> CPU</a></li><li><a href="../02-concepts/02-bios.html"><strong aria-hidden="true">3.2.</strong> BIOS</a></li><li><a href="../02-concepts/03-wram.html"><strong aria-hidden="true">3.3.</strong> Work RAM</a></li><li><a href="../02-concepts/04-io-registers.html"><strong aria-hidden="true">3.4.</strong> IO Registers</a></li><li><a href="../02-concepts/05-palram.html"><strong aria-hidden="true">3.5.</strong> Palette RAM</a></li><li><a href="../02-concepts/06-vram.html"><strong aria-hidden="true">3.6.</strong> Video RAM</a></li><li><a href="../02-concepts/07-oam.html" class="active"><strong aria-hidden="true">3.7.</strong> Object Attribute Memory</a></li><li><a href="../02-concepts/08-rom.html"><strong aria-hidden="true">3.8.</strong> Game Pak ROM / Flash ROM</a></li><li><a href="../02-concepts/09-sram.html"><strong aria-hidden="true">3.9.</strong> Save RAM</a></li></ol></li><li><a href="../03-video/00-index.html"><strong aria-hidden="true">4.</strong> Video</a></li><li><ol class="section"><li><a href="../03-video/01-rgb15.html"><strong aria-hidden="true">4.1.</strong> RBG15 Color</a></li><li><a href="../03-video/TODO.html"><strong aria-hidden="true">4.2.</strong> TODO</a></li></ol></li><li><a href="../04-non-video/00-index.html"><strong aria-hidden="true">5.</strong> Non-Video</a></li><li><ol class="section"><li><a href="../04-non-video/01-buttons.html"><strong aria-hidden="true">5.1.</strong> Buttons</a></li><li><a href="../04-non-video/02-timers.html"><strong aria-hidden="true">5.2.</strong> Timers</a></li><li><a href="../04-non-video/03-dma.html"><strong aria-hidden="true">5.3.</strong> Direct Memory Access</a></li><li><a href="../04-non-video/04-sound.html"><strong aria-hidden="true">5.4.</strong> Sound</a></li><li><a href="../04-non-video/05-interrupts.html"><strong aria-hidden="true">5.5.</strong> Interrupts</a></li><li><a href="../04-non-video/06-link_cable.html"><strong aria-hidden="true">5.6.</strong> Link Cable</a></li><li><a href="../04-non-video/07-game_pak.html"><strong aria-hidden="true">5.7.</strong> Game Pak</a></li></ol></li><li><a href="../05-examples/00-index.html"><strong aria-hidden="true">6.</strong> Examples</a></li><li><ol class="section"><li><a href="../05-examples/01-hello_magic.html"><strong aria-hidden="true">6.1.</strong> hello_magic</a></li><li><a href="../05-examples/02-hello_world.html"><strong aria-hidden="true">6.2.</strong> hello_world</a></li><li><a href="../05-examples/03-light_cycle.html"><strong aria-hidden="true">6.3.</strong> light_cycle</a></li><li><a href="../05-examples/04-bg_demo.html"><strong aria-hidden="true">6.4.</strong> bg_demo</a></li></ol></li></ol>
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<a class="header" href="#object-attribute-memory-oam" id="object-attribute-memory-oam"><h1>Object Attribute Memory (OAM)</h1></a>
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<ul>
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<li><strong>Address Span:</strong> <code>0x700_0000</code> to <code>0x700_03FF</code> (1k)</li>
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</ul>
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<p>The Object Attribute Memory has a 32-bit bus and no default wait, but suffers
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from the "you might have to wait if the display controller is looking at it"
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rule. You cannot write individual bytes to OAM at all, but that's not really a
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problem because all the fields of the data types within OAM are either <code>i16</code> or
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<code>u16</code> anyway.</p>
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<p>Object attribute memory is the wildest yet: it conceptually contains two types
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of things, but they're <em>interlaced</em> with each other all the way through.</p>
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<p>Now, <a href="http://problemkaputt.de/gbatek.htm#lcdobjoamattributes">GBATEK</a> and
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<a href="https://www.cs.rit.edu/%7Etjh8300/CowBite/CowBiteSpec.htm#OAM%20(sprites)">CowByte</a>
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doesn't quite give names to the two data types here.
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<a href="https://www.coranac.com/tonc/text/regobj.htm#sec-oam">TONC</a> calls them
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<code>OBJ_ATTR</code> and <code>OBJ_AFFINE</code>, but we'll be giving them names fitting with the
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Rust naming convention. Just know that if you try to talk about it with others
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they might not be using the same names. In Rust terms their layout would look
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like this:</p>
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<pre><pre class="playpen"><code class="language-rust">
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# #![allow(unused_variables)]
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#fn main() {
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#[repr(C)]
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pub struct ObjectAttributes {
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attr0: u16,
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attr1: u16,
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attr2: u16,
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filler: i16,
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}
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#[repr(C)]
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pub struct AffineMatrix {
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filler0: [u16; 3],
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pa: i16,
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filler1: [u16; 3],
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pb: i16,
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filler2: [u16; 3],
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pc: i16,
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filler3: [u16; 3],
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pd: i16,
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}
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#}</code></pre></pre>
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<p>(Note: the <code>#[repr(C)]</code> part just means that Rust must lay out the data exactly
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in the order we specify, which otherwise it is not required to do).</p>
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<p>So, we've got 1024 bytes in OAM and each <code>ObjectAttributes</code> value is 8 bytes, so
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naturally we can support up to 128 objects.</p>
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<p><em>At the same time</em>, we've got 1024 bytes in OAM and each <code>AffineMatrix</code> is 32
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bytes, so we can have 32 of them.</p>
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<p>But, as I said, these things are all <em>interlaced</em> with each other. See how
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there's "filler" fields in each struct? If we imagine the OAM as being just an
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array of one type or the other, indexes 0/1/2/3 of the <code>ObjectAttributes</code> array
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would line up with index 0 of the <code>AffineMatrix</code> array. It's kinda weird, but
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that's just how it works. When we setup functions to read and write these values
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we'll have to be careful with how we do it. We probably <em>won't</em> want to use
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those representations above, at least not with the <code>AffineMatrix</code> type, because
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they're quite wasteful if you want to store just object attributes or just
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affine matrices.</p>
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